NXP Semiconductors i.MX8 QM - Page 69

Table 35. i.MX8 QM unused power rail strapping recommendations (continued)
Function Ball Name Recommendation if unused
HDMI-TX
VDD_HDMI_TX0_1P0,
VDD_HDMI_TX0_1P8, VDD_HDMI_TX0_LDO_1P0_CAP
Ground
LVDS VDD_LVDS0_1P0, VDD_LVDS0_1P8, VDD_LVDS1_1P0, VDD_LVDS1_1P8 10 kΩ to ground
1
CPU0 VDD_A53 (7 balls in total) 10 kΩ to ground
1
GPU
VDD_GPU0 (10 balls in total)
VDD_GPU1 (10 balls total)
10 kΩ to ground
1
DDR_CH1
VDD_DDR_CH1_VDDQ (10 balls in total), VDD_DDR_CH1_VDDQ_CKE (3
balls in total)
10 kΩ to ground
1
MIPI-DSI
VDD_MIPI_DSI0_1P8, VDD_MIPI_DSI1_1P8 10 kΩ to ground
1
VDD_MIPI_DSI0_1P0, VDD_MIPI_DSI0_PLL_1P0, VDD_MIPI_DSI1_1P0,
VDD_MIPI_DSI1_PLL_1P0
10 kΩ to ground
1, 5
MIPI-CSI
VDD_MIPI_CSI0_1P0, VDD_MIPI_CSI0_1P8,
VDD_MIPI_CSI1_1P0, VDD_MIPI_CSI1_1P8
10 kΩ to ground
1
MLB VDD_MLB_1P8 10 kΩ to ground
1
Common PCIe
balls
VDD_PCIE_LDO_1P8, VDD_PCIE_LDO_1P0_CAP,
VDD_PCIE0_1P0, VDD_PCIE1_1P0, VDD_PCIE_IOB_1P8,
VDD_PCIE0_PLL_1P8, PCIE0_PHY_PLL_REF_RETURN
Leave unconnected
2
PCIe1 VDD_PCIE1_PLL_1P8, PCIE1_PHY_PLL_REF_RETURN Leave unconnected
PCIe/SATA
VDD_PCIE_SATA0_PLL1P8, VDD_PCIE_SATA0_1P0,
PCIE_SATA0_PHY_PLL_REF_ RETURN
Leave unconnected
USB HSIC VDD_USB_HSIC0_1P2, VDD_USB_HSIC0_1P8 Leave unconnected
USB PHYs VDD_ANA0_1P8 10 kΩ to ground
1,3,4
USB OTG1 VDD_USB_OTG1_1P0, VDD_USB_OTG1_3P3 10 kΩ to ground
1,4
USB OTG1 USB_OTG1_VBUS Leave unconnected
4
USB OTG2 VDD_USB_OTG2_1P0, VDD_USB_OTG2_3P3, USB_OTG2_VBUS 10 kΩ to ground
1,4
Digital I/O
supplies
VDD_MIPI_CSI_DIG_1P8, VDD_MIPI_DSI_DIG_1P8_3P3,
VDD_LVDS_DIG_1P8_3P3, VDD_ESAI0_MCLK_1P8_3P3,
VDD_ESAI1_SPDIF_SPI_1P8_3P3, VDD_ENET_MDIO_1P8_2P5_3P3,
VDD_ENET0_1P8_2P5_3P3, VDD_ENET1_1P8_2P5_3P3,
VDD_USDHC1_1P8_3P3, VDD_USDHC2_1P8_3P3,
VDD_USDHC_VSELECT_1P8_3P3, VDD_QSPI0_1P8_3P3,
VDD_QSPI1A_1P8_3P3, VDD_SPI_SAI_1P8_3P3, VDD_EMMC0_1P8_3P3,
These digital I/O supplies
can be left unconnected
when the associated I/O
balls are not in use
CAUTION: Driving/
connecting associated I/O
Table continues on the next page...
NXP Semiconductors
i.MX8 layout/routing recommendations
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 69 / 89