NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 53 of 172
Table 46. System Management Registry
Id Name Access
Rights
Comment Length Default
‘02’ NXP_INFO_NOTIFICATION RW
(EE)
Indicates on information s the host wants to be
notified of.
Bit Information event
0 Overcurrent
1 PmuVcc switch
2 External RF field
3 Memory violation
4
4 Temperature overheat
5
LLC Error Counter reached on
UICC
6...7 RFU
0x0 -> do not notify
0x1 -> notify
1 0x00
‘03’ NXP_INFO_EEPROM_ERR RO
(RAM)
Indicates status of the last EEPROM check
procedure:
- Bit 0: CRC check on Patch area
- Bit 1: CRC check on ConfigPage area
- Others bits are RFU
0x0 -> no CRC error
0x1 -> CRC error
In case of CRC error on Patch area, patches are
disabled.
In case of CRC error on ConfigPage area,
default configuration is applied.
1 0x00
4. To recover first reset the IC and restart the application – if the problem still exists re-download PN544
firmware
To Next Page
Loading...