Omron C200H - Forced Status Hold Bit (CPU11-E Only)

27
Multilevel PC Link Systems
Flag type Bit no. SR 247 SR 248 SR 249 SR 250
Run flags 00 Unit #8,
level 1
Unit #0,
level 1
Unit #8,
level 0
Unit #0,
level 0
01 Unit #9,
level 1
Unit #1,
level 1
Unit #9,
level 0
Unit #1,
level 0
02 Unit #10,
level 1
Unit #2,
level 1
Unit #10,
level 0
Unit #2,
level 0
03 Unit #11,
level 1
Unit #3,
level 1
Unit #11,
level 0
Unit #3,
level 0
04 Unit #12,
level 1
Unit #4,
level 1
Unit #12,
level 0
Unit #4,
level 0
05 Unit #13,
level 1
Unit #5,
level 1
Unit #13,
level 0
Unit #5,
level 0
06 Unit #14,
level 1
Unit #6,
level 1
Unit #14,
level 0
Unit #6,
level 0
07 Unit #15,
level 1
Unit #7,
level 1
Unit #15,
level 0
Unit #7,
level 0
Error flags 08 Unit #8,
level 1
Unit #0,
level 1
Unit #8,
level 0
Unit #0,
level 0
09 Unit #9,
level 1
Unit #1,
level 1
Unit #9,
level 0
Unit #1,
level 0
10 Unit #10,
level 1
Unit #2,
level 1
Unit #10,
level 0
Unit #2,
level 0
11 Unit #11,
level 1
Unit #3,
level 1
Unit #11,
level 0
Unit #3,
level 0
12 Unit #12,
level 1
Unit #4,
level 1
Unit #12,
level 0
Unit #4,
level 0
13 Unit #13,
level 1
Unit #5,
level 1
Unit #13,
level 0
Unit #5,
level 0
14 Unit #14,
level 1
Unit #6,
level 1
Unit #14,
level 0
Unit #6,
level 0
15 Unit #15,
level 1
Unit #7,
level 1
Unit #15,
level 0
Unit #7,
level 0
If the PC is in a Multilevel PC Link System and the content of word 248 is
02FF, then PC Link Units #0 through #7 of in the PC Link Subsystem as-
signed operating level 1 would be in RUN mode, and PC Link Unit #1 in the
same Subsystem would have an error. The hexadecimal digits and corre-
sponding binary bits of word 248 would be as shown below.
Bit no. 15 00. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Binary 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1
Hex 0 2 F F
3-4-3 Forced Status Hold Bit (CPU11-E Only)
SR 25211 determines whether or not the status of bits that have been force-
set or force-reset is maintained when switching between PROGRAM and
MONITOR mode to start or stop operation. If SR 25211 is ON, bit status will
be maintained; if SR 25211 is OFF, all bits will return to default status when
operation is started or stopped. The Force Status Hold Bit is only effective
when enabled with the Set System instruction (SYS(49)).
The status of SR 25211 in not affected by a power interruption unless the I/O
table is registered; in that case, SR 25211 will go OFF.
Application Example
SR Area Section 3-4