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Panasonic AFPX-C30T - Page 463

Panasonic AFPX-C30T
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FP-X Ry type
Item
Add-
ress
Name Default value Description
Inter-
rupt
edge
settings
405
Interrupt
edge setting
for
controller
input
Leading edge
The pressed contact is up and set to trailing
edge.
406
Interrupt
edge setting
for pulse I/O
cassette
Leading edge
The pressed contact is up and set to trailing
edge.
Note1) For counting two-phase input, only CH0, CH2, CH4 and CH6 can be used.
When two-phase input is specified for CH0, CH2, CH4 and CH6, the settings for CH1, CH3,
CH5 and CH7 corresponding to each CH No. are ignored, however, specify the same setting for
those channels.
Note2) The settings for pulse catch and interrupt input can only be specified in system registers 403 and
404.
Note3) If system register 400 to 404 have been set simultaneously for the same input relay, the following
precedence order is effective: [High-speed counter][Pulse catch][Interrupt input].
<Example>
When the high-speed counter is being used in the addition input mode, even if input X0 is
specified as an interrupt input or as pulse catch input, those settings are invalid, and X0
functions as counter input for the high-speed counter.
Note4) Upgrade FPWIN GR to Ver2.6 or higher version if the No. of I/O allocation is indicated with 1-digit
number such as X0 in the setting window No. 403,404 and 406 of FPWIN GR.
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com

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