Panasonic FPG-XY64D2P-A - Writing the Pulse Output Control Code

High-Speed Counter and Pulse Output
FPΣ User's Manual
126
7.4.3.1 Writing the Pulse Output Control Code
The special data register where the high-speed counter and pulse output control code are
stored can be accessed with the system variable sys_wHscOrPulseControlCode. (The system
variable sys_wHscOrPulseControlCode corresponds to special data register DT90052.)
The control code settings for each channel can be monitored using the system variables
sys_wHscChannelxControlCode or sys_wPulseChannelxControlCode (where x=channel
number). The settings of this system variable remain unchanged until another setting
operation is executed.
Operations performed by the high-speed counter control code:
• Setting/resetting near home input
• Continuing/stopping pulse output (forced stop)
• Enabling/disabling counting operations
• Resetting the elapsed value (software reset) of the high-speed counter
Setting/resetting near home input
The near home bit is retained. Set this bit to FALSE right after setting it to TRUE to be able to
set the near home input a second time during a home return.
Continuing/stopping pulse output (forced stop)
By setting bit 3 of the data register storing the pulse output control code
(sys_wHscOrPulseControlCode) to TRUE pulse output is stopped. The possibility of a forced
stop should be provided for in every program using pulse output instructions. Reset bit 3 to
FALSE to continue pulse output.
Enabling/disabling counting operations
01 0
0
2
Y*
1
t
Y* Pulse output
1
Elapsed value
2
Bit 1 of pulse output control code (count)
When bit 1 of the control code is set to TRUE, counting is prohibited and the elapsed value
keeps its current value. Counting is continued when bit 1 is reset to FALSE.