Profichip VPC3+S - Page 104

8 Hardware Interface
104
Revision 1.04
VPC3+S User Manual
Copyright © profichip GmbH, 2012
WR
RD
INTR
Ready-
logic
Clockgenerator
48 MHz
80286
+
Buscontr.
(82288) +
82244
DB
AB
CLK
XWR
XRD
X/INT
XREADY
3K3
Mode
GND
VPC3+
Reset
RTS
TxD
RxD
XCTS
1K
GND
EPROM
64kB
RAM
32kB
address
decoder
Reset
VPC3+
12/24 MHz
clockdivider
DIVIDER
AB 23..0
AB 12..1
DB 15..0
DB 7..0
XCS
CS
CSRAM
CSEPROM
driver, control logic
DB(7..0)
AB(10..0)
RD WR
Figure 8-22: 80286 System (X86 Mode)