Profichip VPC3+S - Dual Port RAM Controller

Hardware Interface 8
VPC3+S User Manual
Revision 1.04
107
Copyright © profichip GmbH, 2012
8.1.8 Application with 80C165
CLK
RESET
XCS
MODE
ALE
XWR
XRD
XTEST0
XTEST1
DIVIDER
48 MHz
1K
1K
1K
3K3
3K3
GND
VDD
µC
µC
µC
µC
AB(10..0)
connect to
VDD or GND
AB0
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
XWRL
XRD
µC
5
8
36
1
23
24
2
4
34
35
3
44
43
41
40
37
42
32
31
29
25
10
CLK2
XDATAEX
XREADY
X/INT
XCTS
RXD
RTS
TXD
VPC3+
µC
1K
RS485
RS485
RS485
7
13
14
9
33
30
27
26
11
12
15
16
19
20
21
22
µC
DB(7..0)
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
GND
GND
GND
VDD
AB0
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
LED for Data_Exchange
XINT/MOT
µC
Figure 8-27: 80C165 Application
8.2 Dual Port RAM Controller
The internal 4K Byte RAM of the VPC3+S is a single-port RAM. An
integrated Dual-Port RAM controller, however, permits an almost
simultaneous access of both ports (bus interface and microsequencer
interface). When there is a simultaneous access of both ports, the bus
interface has priority. This guarantees the shortest possible access time. If
the VPC3+S is connected to a microcontroller with an asynchronous
interface, the controller can evaluate the Ready signal.