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Profichip VPC3+S - Asynchronous Motorola Mode

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Pin Description 3
VPC3+S User Manual
Revision 1.04
15
Copyright © profichip GmbH, 2012
3.2.3 Asynchronous Motorola Mode
In Asynchronous Motorola Mode the data and address busses are separate
(non-multiplexed). When using HC11 types with a multiplexed bus the
address signals AB[7:0] must be generated from the DB[7:0] signals
externally. Address line 11 is to be connected to pin D5 of the VPC3+S.
XDTACK mechanism is supported.
Ball
BGA
Pin
QFP
In/Out
Description
Connect to
E3
9
I
‘0’: Parallel Interface
GND
E4
28
I
‘1’: Motorola Format
VCC
D4
33
I
‘0’: Asynchronous Interface Mode
GND
D5
32
I
Address Lines Bit 11
CPU Address Bus 11
C2
2
I
Address Lines Bits [10:0]
CPU
Address Bus [10:0]
B3
44
I
A1
48
I(S)
B1
1
I(S)
C3
45
I
B2
46
I
B4
41
I
A5
38
I
A6
37
I
B5
39
I
B6
36
I
G4
20
IO
Data Bus [7:0]
CPU Data Bus [7:0]
H5
23
IO
H6
24
IO
G5
22
IO
G6
25
IO
F4
21
IO
F6
27
IO
F5
26
IO
C1
3
I
Chip-Select Signal (active low)
CPU Chip-Select
C5
35
I
Address Strobe (active low)
CPU Address Strobe
C6
34
I
Read-Write Signal (‘1’ = Read)
CPU Read-Write
Figure 3-6: Interface Configuration: Asynchronous Motorola Mode

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