Profichip VPC3+S - Page 12

3 Pin Description
12
Revision 1.04
VPC3+S User Manual
Copyright © profichip GmbH, 2012
Ball
BGA
Pin
QFP
Signal Name
In/Out
Description
Source / Destination
D5
32
XWR / E_CLOCK / AB11
I
Write / E-Clock (Motorola) / Address Bus 11
CPU
D6
19
GND
E1
31
GND
E2
8
CLKOUT
O
Clock Output (12 MHz or 24 MHz)
CPU / System
E3
9
SERMODE
I
‘0’: Parallel Interface
‘1’: Serial Interface (SPI or I2C)
Configuration Pin
E4
28
MOT/XINT
I
‘0’: Parallel Interface Intel Format
‘1’: Parallel Interface Motorola Format
Configuration Pin
E5
29
XTEST1
I
Test Pin 1 (to be connected to VCC)
Test Pin
E6
30
VCC
F1
10
CLK
I(S)
System Clock (48 MHz)
System
F2
11
XDATAEXCH
O
Indicates state ‘Data-Exchange’ for PROFIBUS DP
LED
F3
16
XCTS
I
Clear-To-Send (for FSK-Modem)
PB-Interface
F4
21
DB2
IO
Data Bus 2
CPU
F5
26
DB0
IO
Data Bus 0
CPU
F6
27
DB1
IO
Data Bus 1
CPU
G1
12
RESET
I(S)
Master-Reset (connect to port pin of CPU)
CPU
G2
15
RXD
I
Receive Data
PB-Interface
G3
17
INT
O
Interrupt
CPU / IRQ Controller
G4
20
DB7
IO
Data Bus 7
CPU
G5
22
DB4
IO
Data Bus 4
CPU
G6
25
DB3
IO
Data Bus 3
CPU
H1
13
TXD
O
Transmit Data
PB-Interface
H2
14
RTS
O
Request-To-Send
PB-Interface
H3
42
VCC
H4
43
GND
H5
23
DB6
IO
Data Bus 6
CPU
H6
24
DB5
IO
Data Bus 7
CPU
Figure 3-3: Pin Assignment
Notes: All signals beginning with ‘X’ are LOW active.
VCC = +3.3 V
GND = 0 V
The assignment of AB11 depends on the parallel interface mode selected.
All unused inputs must be connected to GND.
Input Levels:
I :
LVTTL
I (S) :
LVTTL, Schmitt-Trigger