Renesas R8C/20 User Manual

R8C/20 Group, R8C/21 Group 19. Flash Memory
Rev.2.00 Aug 27, 2008 Page 379 of 458
REJ09B0250-0200
Figure 19.2 Flash Memory Block Diagram for R8C/21 Group
User ROM area
Block 0: 32 Kbytes
(1)
0C000h
13FFFh
64 Kbytes ROM product
0FFFFh
10000h
0BFFFh
04000h
Block 1: 32 Kbytes
(1)
User ROM area
Block 0: 32 Kbytes
(1)
0C000h
13FFFh
96 Kbytes ROM product
0FFFFh
10000h
0BFFFh
04000h
Block 1: 32 Kbytes
(1)
Block 2: 32 Kbytes
(2)
14000h
1BFFFh
User ROM area
Block 0: 32 Kbytes
(1)
0C000h
13FFFh
128 Kbytes ROM product
0FFFFh
10000h
0BFFFh
04000h
Block 1: 32 Kbytes
(1)
Block 2: 32 Kbytes
(2)
14000h
1BFFFh
Block 3: 32 Kbytes
(2, 3)
1C000h
23FFFh
User ROM area
Block 0: 16 Kbytes
(1)
0C000h
48 Kbytes ROM product
0FFFFh
0BFFFh
04000h
Block 1: 32 Kbytes
(1)
User ROM area
Block 0: 16 Kbytes
(1)
0C000h
32 Kbytes ROM product
0FFFFh
0BFFFh
08000h
Block 1: 16 Kbytes
(1)
Program ROM
Boot ROM area (reserved area)
(4)
8 Kbytes
0E000h
0FFFFh
Block B: 1 Kbyte
Block A: 1 Kbyte
02400h
02BFFh
Block B: 1 Kbyte
Block A: 1 Kbyte
02400h
02BFFh
Block B: 1 Kbyte
Block A: 1 Kbyte
02400h
02BFFh
Block B: 1 Kbyte
Block A: 1 Kbyte
02400h
02BFFh
Block B: 1 Kbyte
Block A: 1 Kbyte
02400h
02BFFh
NOTES:
1. When setting the FMR02 bit in the FMR0 register to 1 (enables to rewrite) and the FMR15 bit in the FMR1 register to 0 (enables to rewrite),
Block 0 is rewritable. When setting the FMR16 bit to 0 (enables to rewrite), Block 1 is rewritable (only for CPU rewrite mode).
2. When setting the FMR02 bit in the FMR0 register to 1 (enables to rewrite), Block 2 and Block 3 are rewritable (only for CPU rewrite mode).
3. Do not use addresses 20000h to 23FFFh because these areas are used for the emulator debugger. Refer to 23. Notes on Emulator
Debugger.
4. This area is to store the boot program provided by Renesas Technology.

Renesas R8C/20 Specifications

General

Brand	Renesas
Model	R8C/20
Category	Control Unit
Language	English