RH850/F1K Series Hardware Design Guide
R01AN2911EJ0100 Rev. 1.00 Page 25 of 46
Aug 04, 2016
4.4 Pin Assignment Differences
The pin assignment of the RH850/F1K (176pin), RH850/F1L (176pin) and the RH850/F1M (176pin) shows some
hardware related differences as described in the table below.
Table 14 Basic pin assignment differences
RH850/F1K-2 (176pin)
Pin Assignment
RH850/F1L (176pin)
Pin Assignment
RH850/F1M (176pin)
Pin Assignment
P0_0 / TAUD0I2 / TAUD0O2 /
RLIN20RX / CAN0TX / PWGA10O
/ CSIH0SSI / DPO
P0_0 / TAUD0I2 / TAUD0O2 /
RLIN20RX / CAN0TX / PWGA10O
/ CSIH0SSI / DPO / RESETOUT
P0_0 / TAUD0I2 / TAUD0O2 /
RLIN20RX / CAN0TX / PWGA10O
/ CSIH0SSI / DPO / RESETOUT
P8_6 / NMI / CSIH0CSS4 /
PWGA38O / RTCA0OUT /
ADCA0I8S /
RESETOUT
P8_6 / NMI / CSIH0CSS4 /
PWGA38O / RTCA0OUT /
ADCA0I8S
P8_6 / NMI / CSIH0CSS4 /
PWGA38O / RTCA0OUT /
ADCA0I8S
P8_5 / TAUJ0I3 / TAUJ0O3 / NMI
/ CSIH0CSS3 / INTP9 /
PWGA37O / ADCA0I7S
P8_5 / TAUJ0I3 / TAUJ0O3 /
CSIH0CSS3 / INTP9 / PWGA37O
/ ADCA0I7S
P8_5 / TAUJ0I3 / TAUJ0O3 /
CSIH0CSS3 / INTP9 / PWGA37O
/ ADCA0I7S
P8_7 / CSIH3CSS0 / PWGA39O /
ADCA0SEL0 / RTCA0OUT /
ADCA0I14S
P8_7 / CSIH3CSS0 / PWGA39O /
ADCA0I14S
P8_7 / CSIH3CSS0 / PWGA39O /
ADCA0I14S
P9_5 / CSIH0CSS6 / PWGA34O /
TAUJ1I1 / TAUJ1O1 / ADCA0I12S
P9_5 / CSIH0CSS6 / PWGA34O /
TAUJ1I1 / TAUJ1O1 / ADCA0I12S
P9_6 / CSIH0CSS7 / PWGA35O /
ADCA0I13S
P9_6 / CSIH0CSS7 / PWGA35O /
ADCA0I13S
P0_8/ RLIN21TX / DPIN6 /
CSIH0CSS6 / CSIH1SSI /
TAUB0I2 / TAUB0O2 / CAN3TX
P0_8/ RLIN21TX / DPIN6 /
CSIH1SSI / TAUB0I2 / TAUB0O2
/ CAN3TX
P0_8 / RLIN21TX / DPIN6 /
CSIH0CSS6 / CSIH1SSI /
TAUB0I2 / TAUB0O2 / CAN3TX
P0_11 / RIIC0SDA / DPIN12 /
CSIH1CSS2 / TAUB0I8 /
TAUB0O8 / RLIN26RX /
PWGA34O
P0_11 / RIIC0SDA / DPIN12 /
CSIH1CSS2 / TAUB0I8 /
TAUB0O8 / RLIN26RX
P0_11 / RIIC0SDA / DPIN12 /
CSIH1CSS2 / TAUB0I8 /
TAUB0O8 / RLIN26RX /
PWGA34O
P9_3 / KR0I7 / PWGA21O /
CSIH2CSS3 / TAUJ1I1 /
TAUJ1O1 / ADCA0I10S
P9_3 / KR0I7 / PWGA21O /
CSIH2CSS3 / ADCA0I10S
P9_3 / KR0I7 / PWGA21O /
CSIH2CSS3 / TAUJ1I1 /
TAUJ1O1 / ADCA0I10S
P0_6 / INTP2 / DPIN10 / SELDP2
/ CSIH1SC / PWGA35O
P0_6 / INTP2 / DPIN10 / SELDP2
/ CSIH1SC
P0_6 / INTP2 / DPIN10 / SELDP2
/ CSIH1SC / PWGA35O
P11_1 / CSIH2SSI / RLIN20RX /
CSIH0CSS7 / PWGA26O /
TAUB0I13 / TAUB0O13
P11_1 / CSIH2SSI / RLIN20RX /
PWGA26O / TAUB0I13 /
TAUB0O13 / MEMC0AD9
P11_1 / CSIH2SSI / FLXA0TXDA
/ RLIN20RX /
CSIH0CSS7 /
PWGA26O / TAUB0I13 /
TAUB0O13 / MEMC0AD9
Note: The pin assignment differences due to functional differences (e.g. number of peripheral channels) are not
described in the table above and have to be verified based on the pin assignment of the corresponding products.