Technical Description
IP244B
C79000–B8576–C865–01
3–5
1.3 Method of Operation
As shown in the block diagram (Fig. 1.3/1), an analog multiplexer connects the analog input sig-
nals to an analog/digital converter (ADC). At a maximum conversion time of 80 ms, the ADC
converts the input voltage using the dual-slope method. The 13 control loops (8 with Pt100 sen-
sors) are processed cyclically. Open wire diagnostics are performed before digitizing is started;
faults are reported.
An open wire condition can only be detected if the entire line resistance (including the sensor
resistance) is greater than 1 kW. The default state of channels 13 and 14 is no open wire detec-
tion.
The parameters and control commands that are transferred from the CPU via the data bus are
stored in a RAM area that is subdivided into 64 message frames of 32 bytes each. The module
occupies 32 bytes in the PLC address space.
A microprocessor controls the functional sequence of the controller module according to the
operation program (firmware) in an EPROM.
The computed manipulated variable is output as a (pulse-width-modulated) digital value via an
output register. The module is reset when the 5-V power supply fails.
The BASP signal can be used for disabling the digital outputs; the register contents is reset in
this case (see Section 3.4.4, BASP Interpretation).
Provided that the IP 244 B controller module has been installed in a battery-backed (U
BATT
) slot
(the module is able to recognize this condition), the controller’s integral-action values are buff-
ered.
To Next Page
Loading...
Need help?
General
