2 Functions
206
7UT613/63x Manual
C53000-G1176-C160-2
2.8 Unbalanced Load Protection
Unbalanced load protection (negative sequence protection) detects unbalanced loads
on the system. In addition, this protection function may be used to detect interruptions,
faults, and polarity problems with current transformers. Furthermore, it is useful in de-
tecting phase-to-earth, phase-to-phase, and double phase-to-earth faults with magni-
tudes lower than the maximum load current.
The tripping circuit monitoring is only sensible in three-phase protected objects.
Whereas PROT. OBJECT = 1ph Busbar or 1 phase transf. (see Functional
Scope, address 105, section 2.1.3.1) the following settings are not available.
In case of generators and motors, unbalanced loads create counter-rotating fields
which act on the rotor at double frequency. Eddy currents are induced at the rotor
surface leading to local overheating in rotor end zones and slot wedges.
In case of motors with fuses connected in series, a motor operating in single-phase
condition due to operation of a fuse, only generates small and pulsing torque so that
it is soon thermally strained assuming that the torque required by the machine remains
unchanged. In addition, with unbalanced supply voltage it is endangered by thermal
overload. Due to the small negative sequence reaction even small voltage asymme-
tries lead to negative sequence currents.
The negative sequence protection always refers to the three phase currents of the
configured side or measuring location (see „Assigning the Functional Scope“, in Sub-
section 2.1.4).
The unbalanced load protection consists of two definite time stages and one inverse
time stage, The latter may operate according to an IEC or an ANSI characteristic. A
stage with a power-proportional characteristic (negative sequence current) is possible
instead of the inverse time stage.
2.8.1 Function Description
Determination of
Unbalanced Load
The unbalanced load protection of 7UT613/63x filters fundamental components from
applied the phase currents and dissects them into their symmetrical components. Of
this the negative sequence current of the system I
2
is evaluated. If the largest of the
three phase currents lies above the minimum current I-REST of the one assigned
side or measuring location and all phase currents are smaller than 4 times the rated
current of the assigned side or measuring location, then the comparison of negative
sequence current and setting value can take place.
Definite Time Stages
The definite time characteristic is of two-stage design. When the negative sequence
current exceeds the set threshold I2> the timer T I2> is started and a corresponding
pickup message is output. When the negative sequence current exceeds the set
threshold I2>> of the high-set stage the timer T I2>> is started and a corresponding
pickup message is output.
When a delay time is expired trip command is issued.
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