Sony HCD-FL5D - Page 92

92
HCD-FL5D
6
CLR
7
PR
8
VCC
5
Q
RSQ
3
Q
2
D
4
GND
1
CK
QDC
1
5
2
4
3
IN B
VCC
IN A
GND
OUT Y
NC
A9 A8 A7 A6 A5 A4 VSS
NC NC
A0 A1 A2 A3
VCC VCC
DQ1 DQ2 DQ3 DQ4
VCC
DQ5 DQ6 DQ7 DQ8
WE
RAS
3132 2930 262728
2019 2221 24 25232
VCC
1 43 65 87 109
VSS DQ16 DQ15 DQ14 DQ13 VSS DQ12 DQ11 DQ10 DQ9
4950 4748 4546 4344 4142 35
I/O
SELECTOR
OUTPUT
BUFFER
INPUT
BUFFER
OUTPUT
BUFFER
INPUT
BUFFER
SENSE
AMPLIFIER
COLUMN
DECODERS
MEMORY
CELLS
WORD
DRIVERS
ROW
DECODERS
ON CHIP
VBB GENERATOR
ON CHIP
IVCC GENERATOR
COLUMN
ADDRESS
BUFFERS
LCAS
34
UCAS
33
OE
I/O
CONTROLLER
I/O
CONTROLLER
17 18
11 – 16
NC
40 – 36
ROW
ADDRESS
BUFFERS
INTERNAL
ADDRESS
COUNTER
REFRESH
CONTROL
CLOCK
TIMING
GENERATOR
VCC VCC
VCC
VCC
IC706 MSM51V18165F-60TSKR1
IC902 TC7S32FU (TE85R)
IC903 BR24C08F-E2
IC904 TC7W74FU
START
STOP
LOGIC
SERIAL
CONTROL
LOGIC
H.V. PUMP/TIMING
LOAD
R/W
LOAD
Y DEC
INC
COMP
DATA RECOVERY
E PROM
SERIAL MUX
D /ACK
LOGIC
D
IN
OUT
D
X DEC
DEVICE
ADDRESS
COMPARATOR
DATA WORD
ADDR/COUNTER
1 2 3 4
678 5
OUT
2
EN
VCC WP SCL SDA
GND
A2 A1 A0