118
HCD-FL7D
• DSP BOARD IC601 CXD9720Q (AUDIO DIGITAL SIGNAL PROCESSOR)
Pin No. Pin Name I/O Description
1
VSS —
Ground terminal
2
XRST I
Reset signal input from the digital audio interface receiver “L”: reset
3
EXTIN I
Master clock signal input terminal Not used
4
LRCKI3 I
L/R sampling clock signal input from the A/D converter or digital audio interface receiver or
digital audio processor
5 VDDI —
Power supply terminal (+3.3V)
6
BCKI3 I
Bit clock signal (2.8224 MHz) input from the A/D converter or digital audio interface receiver or
digital audio processor
7
PLOCK O
Internal PLL lock signal output terminal Not used
8 VSS —
Ground terminal
9
MCLK1 I
System clock input terminal (13 MHz)
10
VDDI —
Power supply terminal (+3.3V)
11
VSS —
Ground terminal
12
MCLK2 O
System clock output terminal (13 MHz)
13
MS I
Master/slave selection signal input terminal “L”: slave, “H”: master (fixed at “L” in this set)
14
SCKOUT O
Internal system clock signal output to the D/A converter
15
LRCKI1 I
L/R sampling clock signal input from the A/D converter or digital audio interface receiver or
digital audio processor
16 VDDE —
Power supply terminal (+3.3V)
17
BCKI1 I
Bit clock signal (2.8224 MHz) input from the A/D converter or digital audio interface receiver or
digital audio processor
18
SDI1 I
Audio serial data input from the digital audio interface receiver or digital audio processor
19
LRCKO O
L/R sampling clock signal (44.1 kHz) output to the D/A converter
20
BCKO O
Bit clock signal (2.8224 MHz) output to the D/A converter
21
VSS —
Ground terminal
22
KFSIO I
Audio clock signal input from the digital audio interface receiver
23 to 26 SDO1 to SDO4 O
Audio serial data output to the D/A converter
27
SPDIF O
S/PDIF signal output terminal Not used
28
LRCKI2 I
L/R sampling clock signal input from the A/D converter or digital audio interface receiver or
digital audio processor
29
BCKI2 I
Bit clock signal (2.8224 MHz) input from the A/D converter or digital audio interface receiver or
digital audio processor
30
SDI2 I
Audio serial data input from the A/D converter
31
VSS —
Ground terminal
32
HACN O
Acknowledge signal output to the system controller
33
HDIN I
Write data input from the system controller
34
HCLK I
Clock signal input from the system controller
35
HDOUT O
Read data output to the system controller
36
HCS I
Chip select signal input from the system controller
37
GP12 O
Clock signal output terminal Not used
38
GP13 O
Clock enable signal output terminal Not used
39
GP14 O
Row address strobe signal output terminal Not used
40
VDDI —
Power supply terminal (+3.3V)
41
VSS —
Ground terminal
42
GP15 O
Column address strobe signal output terminal Not used
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TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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