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ST STEVAL-WBC2TX70 User Manual
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Figure 30.
STEV
AL-WBC2TX70 circuit schematic (2 of 6)
Vol
ta
ge
dou
ble
r
R
e
q
u
ire
d
f
o
r
Q
i
1
.
3
Add
it
ion
al
NTC
O
p
ti
o
n
a
l
C2
13
X7R
50
V
33
0NF
R2
19
10
R
1
X1
3
X2
2
COVER
1
4
COVER
2
Y200
NP
R2
05
NP
R2
04
1
0 K
R2
00
0R
1
NTC
R2
06
47
K
R2
02
10
K
R2
18
1%
3.3
K
R2
01
10
R
R2
03
15
0 K
R2
17
47
0 K
D20
6
BAT54KFILM
R2
08
10
K
D20
4
BAT54KFILM
R2
09
10
K
/I2C
GPIO
driver
gate
Boostrap
driver
gate
Boostrap
Main
PWM
driver
gate
Boostrap
Analo
g
Demod
Q-F driver
Contr
oller
DCDC
Main
PWM
/SPI
GPIO
UART
PD/QC
USB
Buck
ISns
6
VDD
2
LDO_3
V3
3
VREF
_A
4
MCU_3
V3
8
MCU_VSS
1
60
US
B_DM
59
US
B_DP
11
XTA
L_OUT
10
XTA
L_IN
12
NRS
T
5
LDO_1
V8
46
LED1
47
LED2
27
VDD_DR
23
S
PI_MISO
24
S
PI_MOS
I
21
UART_TX
28
HS
1_
BT
29
HS
1_
GD
30
HS
1_
SW
31
LS1
_G
D
36
HS
2_
BT
35
HS
2_
GD
34
HS
2_
SW
32
LS2
_G
D
41
GND_
DR
9
BUCK_F
B
14
BUCK_S
W
15
BUCK_BT
16
VI
N
22
UART_R
X
43
GP
I
O
_DR
1
42
GP
I
O
_DR
0
48
S
WDIO
49
S
WC
LK
25
S
PI_NS
S
1
IRQ
68
AGND
54
BRG
_VREF
20
S
PI_C
LK
19
TEMP
SNS
53
BRG
_ISNS
_P
52
BRG
_ISNS
_M
50
BRG
_VSNS
62
I2C_
SDA
63
I2C_
SC
L
13
P
GND
55
BRG
_IDEM
56
BRG
_FT_
S
57
BRG
_FT_
R
7
MCU_VSS
64
RING_F
T_S
65
RING_F
T_R
66
QF
_DRV
69
EP
A
D
33
DCDC_
S
NS
17
VI
N_ISNS
_P
18
VI
N_ISNS
_N
26
VDOUB_S
W
37
HS
3_
BT
38
HS
3_
GD
39
HS
3_
SW
40
LS3
_G
D
44
GP
I
O
_DR
2
45
GP
I
O
_DR
3
58
CC
1
61
CC
2
67
RING_S
NS
51
DCDC_
FB
U20
0
S
TWBC
2-HP
R2
07
1%
10
0 K
D20
5
BAT54KFILM
C2
00
NP
L200
10
uH
D20
0
RB5
41
VM
-40
C2
22
C0
G
50
V
NP
C2
27
X7R
50
V
10
NF
C2
08
C0
G
50
V
1NF
C2
02
X5R
35
V
47
0NF
C2
24
X7R
25
V
10
0NF
C2
28
C0
G
50
V
33
P
F
C2
20
X7R
10
0V
1NF
R2
20
0 R
R2
27
4.7
K
C2
04
16
V
10
UF
X5R
C2
36
X7R
25
V
10
0NF
C2
01
X5R
6.3
V
4.7
UF
R2
12
2.2
R
R2
25
2.2
R
R2
26
2.2
R
C2
14
X7R
50
V
10
NF
C2
07
X7R
25
V
10
0NF
C2
38
X5R
6.3
V
1UF
C2
39
NP
4
OUT
5
VCC
3
IN-
1
IN+
2
GND
U203
LM
V321IL
T
R2
29
10 K
R2
30
0.1
%
18
0 K
C2
40
50
V
X7R
2.2
NF
R2
31
0.1
%
1.2
K
R2
32
0.1
%
9.1
K
R2
33
0.1
%
5.6
K
R2
34
0.1
%
18
0 K
1
2
3
4
J
20
1
D20
3
GR
EEN
D20
2
RE
D
R2
35
1
00
R
3
1
2
Q2
01
N-MOS
2N7
00
2
C2
30
X7R
25
V
10
0NF
C2
29
16
V
10
UF
X5R
TP
20
0
TP
20
2
R2
36
0 R
R2
37
0 R
D20
1
RB5
41
VM
-40
1
NC3
2
VCC
3
NC1
4
GND
5
S
DA
6
NC2
7
S
CL
8
NRE
SE
T
U20
1
S
TSAFE
-A110
J
20
0
R2
38
NP
C2
42
X7R
50
V
10
0NF
C2
41
X7R
50
V
10
0NF
TP
20
3
TP
20
1
TP
20
4
NTC
R2
11
47
K
R2
13
47
0 K
C2
06
16
V
10
UF
X5R
C2
16
X7R
50
V
10
NF
C2
25
X7R
50
V
10
NF
R2
10
15
0 K
C2
03
X7R
50
V
10
0NF
C2
10
X7R
50
V
10
0NF
C2
35
X5R
6.3
V
4.7
UF
C2
43
X7R
50
V
10
0NF
C2
23
X7R
25
V
10
0NF
C2
18
X7R
25
V
10
0NF
C2
17
X7R
25
V
10
0NF
C2
12
X7R
50
V
33
0NF
C2
11
X7R
50
V
33
0NF
R2
28
4.7
K
C2
21
C0
G
50
V
NP
C2
15
X7R
25
V
10
0NF
VBUCK
3V3
3V3
3V3
VBUCK
VDCDC
US
B_DP
US
B_DM
S
WDIO
S
WC
LK
UART_TX
UART_R
X
S
W_
HS2
GD_
LS2
NRE
SE
T
US
B_CC
2
US
B_CC
1
GD_
HS1
S
W_
HS1
GD_
LS1
GD_
HS2
GD_
HS3
S
W_
HS3
GD_
LS3
BRIDGE_
I
S
NS
_P
RING_NO
DE
I2C_
SC
L
I2C_
SDA
VI
N_ISNS
_N
VI
N_ISNS
_P
FAN
LED1
LED2
3V3
TEMP
TEMP
DCDC_
S
HOR
T
GP
I
O
_DR
1
RING_S
NS
QF
_S
HOR
T
VDD_DR
VDD_DR
BRIDGE_
I
S
NS
_N
3V3
3V3
I2C_S
CL
I2C_S
DA
1V8
1V8
VREF
VREF
VREF
3V3
VREF
BRIDGE_
I
S
NS
_P
FAN_F
B
3V3
VBUCK
VBUCK
LED1
LED2
S
PI_MOS
I
RING_S
NS
QF
_DRV
QF
_S
HOR
T
QF
_DRIVER
I2C_S
DA
I2C_S
CL
QF
_DRV
NRE
SE
T
I2C_S
CL
I2C_S
DA
3V3
IRQ
VI
N
S
W_
HS1
BUCK_5
V5
GP
I
O
_DR
1
IRQ
S
PI_MOS
I
3V3
UM3286
-
Rev 1
page 45/84
UM3286
STEVAL-WBC2TX70 description
44
46
Table of Contents
Figure 1. STEVAL-WBC2TX70 Evaluation Board
1
1 Getting Started
2
Table 1. Reference Design Specifications
3
2 Reference Design Specifications
3
Figure 2. Board Overview
4
Test Points
6
3 Overview of the Board
4
Table 2. Test Points
6
Figure 3. Test Points
6
Basic Operating Modes
7
Status Leds
7
Table 3. Status Leds Meaning
7
Figure 4. Block Diagram
8
Bridge Current Monitor
9
Bridge Voltage Monitor
9
DC-DC Current Monitor
9
Onboard Voltage Sources
9
DC-DC Buck Converter
9
The 3.3 V LDO
9
The 1.8 V LDO
9
Voltage Doubler
9
Ring Voltage Monitor
9
Chip Reset
10
Power up Sequence
10
Protections Overview
10
Main Overcurrent Protection (OCP)
10
Overvoltage Protection (OVP)
10
Voltage Drop
11
RX Overvoltage Protection - Static/Dynamic OVP, Currentdrop OVP
11
Overtemperature Protection (OVTP)
11
Ntc
11
Qfod
11
Uvlo
10
Foreign Object Detection (FOD)
11
Presence Detection
11
Comparing to Reference Q Factor
12
Power Balance
12
EPT Reason
12
WPC Qi Wireless Power Transfer
12
Baseline and Extended Power Profiles
12
4 Device Description and Operation
8
Adc
8
Power Inverter
8
System Block Diagram
8
Figure 5. Difference between BPP and EPP Power Transfer Startup
12
Wireless Power Interface
14
Figure 6. ASK Modulation
15
Bidirectional Communication
14
ASK Communication
14
Figure 8. Example of Bit Encoding
15
Figure 9. Example of Byte Encoding
16
Figure 10. Format of the Three Defined Messages
17
Most Common Qi Communication Packets
17
Stlink
18
STLINK Drivers
18
Stm32Cube Programmer
18
Firmware Flash Programming
19
Figure 11. STLINK Parameters
19
Figure 12. Programming the Chip
19
Uart
20
Firmware Update Without GUI
20
UART Configuration
20
Figure 7. ASK Timing
15
FSK Communication
16
Figure 13. Bootloader Start
20
Table 4. Switch to Boot Mode
21
Table 5. Init in Bootloader
21
Table 6. Get Command
21
Table 9. Calibration Command
23
Figure 14. the Certificate Chain Process
24
Figure 15. the Authentication Process
24
Table 10. STSAFE-A110 Certificate Chain Elements
25
Fan Support
26
How to Acquire Official STSAFE-A110 Samples
26
Figure 16. the Initial State of the GUI
27
Info Page
28
Status Semaphore
28
The Qi Authentication Procedure
24
STSAFE-A110 Test Profile for STEVAL-WBC2TX70
25
Table 8. Memory Write Command
22
Table 7. Memory Erase Command
22
Bootloader and Boot Pin
23
Stsafe
23
STSAFE-A110 for Qi Authentication
23
5 Graphical User Interface (GUI)
27
Connecting STWBC2 to the GUI
27
Figure 17. Port Selection
28
Figure 18. Status Semaphore
28
Figure 19. Event Box
29
Table 11. Available Events
30
Device Metrics
33
Event Box
29
Figure 21. Input Power Supply Indication
33
Figure 20. Device Metrics
33
Figure 23. Rx Identification Data
35
Figure 24. Example of Captured Charts
36
Parameters Page
36
Table 12. Chart Controls and Shortcuts
36
Figure 25. Save and Load Buttons
37
Table 13. List of Configurable Parameters
37
Figure 26. Read and Write Operation Buttons
40
Figure 27. Save Button, Choosing of Saved Data Type and Save Dialog
40
Read/Write to Device
40
Traces Page
40
Using Traces for FOD Tuning Data Collection
40
Figure 28. Test Points
42
Current Drop OVP
43
Dynamic OVP
43
Ring Node Overvoltage
43
Figure 22. Device Information
35
Configuration File
37
Device Parameters
37
FW Page
41
Calibration
41
Loading the Firmware into an Empty Device
41
Obtaining the Firmware Update File
41
Updating Firmware of a Previously Programmed Device
41
Recommended Flow of Prototyping and Production
42
Protection Tuning
42
Foreign Object Detection
42
Static OVP
42
Rx Information
35
Tx Information
35
Charts Page
36
Chart Controls and Shortcuts
36
6 STEVAL-WBC2TX70 Description
44
Figure 29. STEVAL-WBC2TX70 Circuit Schematic (1 of 6)
44
Schematic Diagrams
44
Figure 30. STEVAL-WBC2TX70 Circuit Schematic (2 of 6)
45
Figure 31. STEVAL-WBC2TX70 Circuit Schematic (3 of 6)
46
Figure 32. STEVAL-WBC2TX70 Circuit Schematic (4 of 6)
47
Figure 33. STEVAL-WBC2TX70 Circuit Schematic (5 of 6)
47
Figure 34. STEVAL-WBC2TX70 Circuit Schematic (6 of 6)
48
Table 14. STEVAL-WBC2TX70 BOM
49
Component Assembly
54
Figure 35. Component Assembly
54
Figure 36. PCB Top Layer
55
Figure 37. PCB Inner1 Layer
55
STEVAL-WBC2TX70 PCB Layout
55
Figure 38. PCB Inner2 Layer
56
Figure 39. PCB Bottom Layer
56
Table 15. Basic Parameters
57
Figure 40. Device Power up
58
Power-Up Waveforms
58
Typical Performance Characteristics
58
Analog and Digital Ping
59
Figure 41. Analog and Digital Ping
59
Efficiency and Spatial Freedom in the XY Plane
60
Figure 42. Startup of EPP
60
Startup of EPP
60
Figure 43. Setup for Offset Test
61
Figure 44. X-Axis Offset Impact on Efficiency
61
Efficiency and Spatial Freedom in the Z-Axis
62
Figure 45. Y-Axis Offset Impact on Efficiency
62
Figure 46. Z-Axis Offset Impact on Efficiency
62
Thermal Performance
63
STWBC2 Default Configuration
57
Bill of Materials (BOM)
49
Figure 47. Thermal Performance
63
7 Designing a Wireless Power Transmitter Based on STEVAL-WBC2TX70
64
Evaluation Board
64
BOM Reduction Suggestions
64
Figure 48. Layer 1 High Power Tracks
64
Figure 49. Layer 4 GND
65
Figure 50. Placement of Input Connectors, Filtering, and Protections
66
VIN, Vbuck, and Vdoubler
67
Board Input Layout
66
Layout Guidelines
64
High Power Tracks
64
Ground Plane on Layer 4
65
Figure 51. Larger Tracks of DC-DC Buck, VIN
67
Figure 52. Green: DC-DC Buck Placement. Yellow: Capacitors Close to STWBC2 IC
68
Figure 53. VIN ISNS Routing
69
DC-DC Boost Circuit
70
Main Bridge Circuit
70
Figure 54. DC-DC Boost Circuit Routing
70
Figure 55. Main Bridge Circuit
70
Bridge ISNS Routing
71
DC-DC Short Circuit
71
Gate Drivers Routing
71
Q Factor Driver
71
VIN ISNS Routing
69
Figure 56. Bridge ISNS Routing
71
Figure 57. DC-DC Short Path through Q404
71
8 Board Versions
72
Table 16. STEVAL-WBC2TX70 Versions
72
9 Regulatory Compliance Information
73
10 References
74
11 Acronyms and Definition
75
Table 17. List of Acronyms
75
Revision History
76
Table 18. Document Revision History
76
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ST STEVAL-WBC2TX70 Specifications
General
Brand
ST
Model
STEVAL-WBC2TX70
Category
Motherboard
Language
English
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