4.5 Power up sequence
Once power is applied to the input (and the device is not forced into reset), the power-up sequence of the device
is initiated.
When the voltage raises over the UVLO threshold, the DC-DC buck powers up and starts providing voltage for the
1.8 V and 3.3 V LDOs. When both LDOs reach the target voltage, AFE's reset is released. Then the MCU startup
sequence begins.
First, the firmware startup is initiated. The MCU to AFE clock signal is enabled. The AFE calibration data are read
and applied. Second, the USB is checked. The firmware determines whether the device is powered from the USB
or the barrel jack. If a USB power source is detected, its type is examined. In the case of USB PD, the available
voltage levels are read and the supply voltage is set to 5 V.
The firmware then checks whether the DC-DC buck circuit is capable of delivering 5 V, considering the input
voltage level. If it determines the input voltage is high enough, it switches the buck into a 5 V output mode. If not,
it remains in a 3.6 V output mode. If the input voltage is lower than required even for 3.6 V operation, the IC is
reset.
After the power-up sequence, the device enters a low power mode and performs an analog ping every 250 ms.
The power-up sequence is only initiated, if the firmware is properly loaded into the device.
4.6 UVLO
STWBC2 is also equipped with a UVLO function. The UVLO is triggered when the input voltage drops below 3.5
V. The inverter stops switching and the device is powered down. Normal operation is resumed as soon as the
input voltage rises above 3.9 V.
4.7 Chip reset
The NRESET signal on the STEVAL-WBC2TX70 board is connected to reset pins of STWBC2 and STSAFE
chips. Pulling this signal down forces both chips into reset. When released, this signal is pulled up to 3.3 V via a
10 kΩ resistor, allowing the device to resume normal operation.
4.8
Protections overview
The STEVAL-WBC2TX70 board uses both hardware and software protection to ensure safe voltage and current
levels. The purpose of those protections is to avoid damage to the board itself or to the potential receiver caused
by unexpected conditions such as overvoltage and/or overcurrent and overtemperature.
The hardware protections implemented outside the STWBC2 chip include:
• Overvoltage protection, inverted power supply polarity: 24 V TVS diode D100
• ESD diodes D103 on USB CC1, CC2
• Common-mode filter with ESD protection D102 on USB D+, D-
• ESD, overvoltage protection diode D500 on FAN feedback
Triggering of a software protection will be indicated by an event message as listed in Section 5.2.2.1: Available
events.
Refer to Section 5.4.2: Device parameters for the list of tunable parameters of the protections.
More details about the Protections and their tuning can be found in the OVP tuning guide.
4.8.1 Main overcurrent protection (OCP)
Monitors the input current of the board. The current value is obtained by measuring a voltage drop on the R408
sensing resistor. The STWBC2 senses the voltage on BRG_ISNS_P and BRG_ISNS_N pins.
The default threshold is set to 5000 mA and can be adjusted via configuration.
If the threshold is reached, the current limitation is activated.
4.8.2 Overvoltage protection (OVP)
The input voltage is limited by a 24 V TVS diode, which is placed at the input of the board.
The ring node voltage can be significantly higher than the input voltage. Therefore, it is measured and compared
to a configurable threshold. The reported value is a raw ADC value, and the default threshold is 12000. When the
threshold is reached, the device ignores all positive control error packets until the voltage drops below the
threshold again.
UM3286
Device description and operation
UM3286 - Rev 1
page 10/84
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