CHAPTER FOUR
The output of U39 pin 1 is attenuated by R101 (LEVEL) and buffered by U42 to provide a low
impedance IRIG B AC Code OUT.
Power status is provided by U20, which monitors the +12V. Power status is important during
both the Power-UP and Power-Down transitions. During Power-Up U20 holds PON (Power ON)
low until +12V is high enough to provide a regulated +5V for the logic. PRES/ goes to U23
where RES/ is generated following configuration of U23. RES/ is used throughout the
TymMachine to initialize hardware to a known status. Following RES/, a Firmware startup
procedure is performed. Then the main program executes. When power is lost for any reason,
PON goes false forcing NMI/ false. Following shutdown, the status of PON is monitored to
provide program recovery without a Reset if the power failure was momentary
4.6 [2] STCG (GENERATOR μP)
This logic contains the heart of the Microprocessor: the Microprocessor-controller, the ROM-
program storage, and the RAM-variable storage.
The Microprocessor (U24) is an 8 bit CMOS device. It accepts as an input clock ∅2-IN and
outputs ∅2 clock.
Other inputs are the non-maskable interrupt (NMI/), the maskable interrupt (IRQ/), and Reset
(RES/). The data lines (D0-D7) are bi-directional. The address lines (A0-A15) are outputs. The
ROM (U21) contains the program, which the Microprocessor executes. When an address of 1000
Hex or more is on the address bus, the ROM outputs to the data bus while ∅2 is high. The RAM
(U16) is used for temporary storage of data and variables.
The RAM used in the TymMachine is a combination of static RAM (SRAM) and electrically
erasable PROM (E
2
PROM). The internal configuration provides a byte of E
2
PROM for every
byte of RAM. In normal system operation, all reads and writes are to the RAM, but when power
fails, every byte of RAM is written to E
2
PROM. When power returns, each byte of E
2
PROM is
written to RAM. This feature enables the TymMachine to remember user entered configuration
information during any power outage.
The RAM is disabled for all addresses above X3FF Hex by U23, as the addresses are used by
options and ROM. The RAM is also disabled for addresses in the range XXE0-XXFF by U23,
permitting the VIA’s [3] to use that range.
U23 is used to decode I/O1 through I/O7 which are used to enable option assemblies, and I/O0.
I/O0/ through I/O7/ correspond to addresses N400 Hex-NFFF Hex when N is the I/O number
0-7.
Interrupt requests from the options are connected to IR1/-IR6/. When any of these lines is
asserted (low), an output from U23 goes low asserting IRQ/. When interrupt request is
processed, reading I/O0 puts the address of the interrupt source with highest priority on to the
data bus provided by a priority encoder in U23.
4-8 TM7000 TymMachine TCG/T (Rev D) Symmetricom, Inc.
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