I/O Registers
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P1 (0x90) – Port 1
Bit Name Reset R/W Description
7:0
P1[7:0]
0xFF R/W Port 1. General-purpose I/O port. Bit-addressable from SFR. This CPU-internal register is readable,
but not writable, from XDATA (0x7090).
P2 (0xA0) – Port 2
Bit Name Reset R/W Description
7:5 – 000 R0 Reserved
4:0
P2[4:0]
1 1111 R/W Port 2. General-purpose I/O port. Bit-addressable from SFR. This CPU-internal register is readable,
but not writable, from XDATA (0x70A0).
PERCFG (0xF1) – Peripheral Control
Bit Name Reset R/W Description
7 – 0 R0 Reserved
6
T1CFG
0 R/W Timer 1 I/O location
0: Alternative 1 location
1: Alternative 2 location
5
T3CFG
0 R/W Timer 3 I/O location
0: Alternative 1 location
1: Alternative 2 location
4
T4CFG
0 R/W Timer 4 I/O location
0: Alternative 1 location
1: Alternative 2 location
3:2 – 00 R/W Reserved
1
U1CFG
0 R/W USART 1 I/O location
0: Alternative 1 location
1: Alternative 2 location
0
U0CFG
0 R/W USART 0 I/O location
0: Alternative 1 location
1: Alternative 2 location
APCFG (0xF2) – Analog Peripheral I/O Configuration
Bit Name Reset R/W Description
7:0
APCFG[7:0]
0x00 R/W Analog Perpheral I/O configuration . APCFG[7:0] select P0.7–P0.0 as analog I/O.
0: Analog I/O disabled
1: Analog I/O enabled
P0SEL (0xF3) – Port 0 Function Select
Bit Name Reset R/W Description
7:0
SELP0_[7:0]
0x00 R/W P0.7 to P0.0 function select
0: General-purpose I/O
1: Peripheral function
P1SEL (0xF4) – Port 1-Function Select
Bit Name Reset R/W Description
7:0
SELP1_[7:0]
0x00 R/W P1.7 to P1.0 function select
0: General-purpose I/O
1: Peripheral function
88
I/O Ports SWRU191C–April 2009–Revised January 2012
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