Xilinx 7 Series - FBG484 Package Placement Diagram

244 www.xilinx.com 7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
Appendix A: Placement Information by Package
FBG484 Package Placement Diagram
Figure A-7 show the placement diagram for the FBG484 package.
X-Ref Target - Figure A-7
Figure A-7: Placement Diagram for the FBG484 Package
D7 MGTPTXP3_216
C7 MGTPTXN3_216
D9 MGTPRXP3_216
C9 MGTPRXN3_216
B6 MGTPTXP2_216
UG482_aA_04_021113
A6 MGTPTXN2_216
B10 MGTPRXP2_216
A10 MGTPRXN2_216
F10 MGTREFCLK1P_216
E10 MGTREFCLK1N_216
F6 MGTREFCLK0P_216
E6 MGTREFCLK0N_216
D5 MGTPTXP1_216
C5 MGTPTXN1_216
D11 MGTPRXP1_216
C11 MGTPRXN1_216
B4 MGTPTXP0_216
A4 MGTPTXN0_216
B8 MGTPRXP0_216
A8 MGTPRXN0_216
XC7A200T:
GTPE2_CHANNEL_X0Y7
XC7A200T:
GTPE2_CHANNEL_X0Y6
XC7A200T:
GTPE2_COMMON_X0Y1
XC7A200T:
GTPE2_CHANNEL_X0Y5
XC7A200T:
GTPE2_CHANNEL_X0Y4
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