Z8
®
CPU
User Manual
UM001604-0108 Address Space
8
With 4-bit addressing, the register file is logically divided into 16 Working Register
Groups of 16 registers each, as listed in Table 3. These 16 registers are known as Working
Registers. A Register Pointer (one of the control registers,
FDh) contains the base address
of the active Working Register Group. The high nibble of the Register Pointer determines
the current Working Register Group.
When accessing one of the Working Registers, the 4-bit address of the Working Register is
combined within the upper four bits (high nibble) of the Register Pointer, thus forming the
8-bit actual address. Figure 4 on page 9 displays this operation. Because working registers
are typically specified by short format instructions, there are fewer bytes of code required,
which reduces execution time. In addition, when processing interrupts or changing tasks,
the Register Pointer speeds context switching. A special Set Register Pointer (SRP)
instruction sets the contents of the Register Pointer.
Table 3. Working Register Groups
Register Pointer
(FDh) High Nibble
Working Register
Group (Hex)
Actual Registers
(Hex)
1111b F F0–FF
1110b E E0–EF
1101b D D0–DF
1100b C C0–CF
1011b B B0–BF
1010b A A0–AF
1001b 9 90–9F
1000b 8 80–8F
0111b 7 70–7F
0110b 6 60–6F
0101b 5 50–5F
0100b 4 40–4F
0011b 3 30–3F
0010b 2 20–2F
0001b 1 10–1F
0000b 0 00–0F
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