Z8
®
CPU
User Manual
UM001604-0108 Instruction Description
247
tests bit 1 of the destination operand for 0. The Z Flag is set indicating bit 1 in the destina-
tion operand was 0. The S and V Flags are cleared.
Example 6
If Register 5Dh contains A0h, and Register A0h contains 0Fh (00001111b), the state-
ment:
TM @5D, #10h
Op Code: 77 5D 10
tests bit 4 of the Register A0h for 0. The Z Flag is set indicating bit 4 in the destination
operand was 0. The S and V Flags are cleared.