ABOV SEMICONDUCTOR MC81F4204 - Page 149

MC81F4204
April 24, 2012 Ver.1.41 149
Register / Memory Operation
NO. MNEMONIC
OP
CODE
BYTE
NO
CYCLE
NO
OPERATION
FLAG
NVGBHIZC
1 LDA #imm C4 2 2
2 LDA dp C5 2 3
3 LDA dp + X C6 2 4
4 LDA !abs C7 3 4
5 LDA !abs + Y D5 3 5
6 LDA [ dp + X ] D6 2 6
7 LDA [ dp ] + Y D7 2 6
8 LDA { X } D4 1 3
Load accumulator
A ← ( M )
9 LDA { X }+ DB 1 4
X-register auto-increment :
A ← ( M ), X ← X + 1
N-----Z-
10 LDM dp, #imm E4 3 5
Load memory with immediate data :
( M ) ← imm
--------
11 LDX #imm 1E 2 2
12 LDX dp CC 2 3
13 LDX dp + Y CD 2 4
14 LDX !abs DC 3 4
Load X-register
X ← ( M )
N-----Z-
15 LDY #imm 3E 2 2
16 LDY dp C9 2 3
17 LDY dp + Y D9 2 4
18 LDY !abs D8 3 4
Load Y-register
Y ← ( M )
N-----Z-
19 STA dp E5 2 4
20 STA dp + X E6 2 5
21 STA !abs E7 3 5
22 STA !abs + Y F5 3 6
23 STA [ dp + X ] F6 2 7
24 STA [ dp ] + Y F7 2 7
25 STA { X } F4 1 4
Store accumulator contents in memory
( M ) ← A
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