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ABOV SEMICONDUCTOR MC81F4204 - Page 85

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MC81F4204
April 24, 2012 Ver.1.41 85
EINT0L – EXT 10,11,0,1 / R00~R03
R0 PORT EXTERNAL INTERRUPT ENABLE LOW REGISTER 00CBH
A reset clears the EINT0L register to ‘00H’, disables EXT1-EXT0, EXT11-EXT10 interrupt. You can
use EINT0L register setting to select Disable interrupt or Enable interrupt (by falling, rising, or both
falling and rising edge).
7 6 5 4 3 2 1 0
EINT0L
EXT1IE EXT0IE EXT11IE EXT10IE
Reset value: 00H
R/W R/W R/W R/W R/W R/W R/W R/W
EXT1IE
R03/EXT1 External Interrupt Enable Bits
EXT0IE
R02/EXT0 External Interrupt Enable Bits
EXT11IE
R01/EXT11 External Interrupt Enable Bits
EXT10IE
R00/EXT10 External Interrupt Enable Bits
00: Disable Interrupt
01: Enable Interrupt by falling edge
10: Enable Interrupt by rising edge
11: Enable Interrupt by both falling and
rising edge
EINT1 – EXT 6~9 / R10~R13
R1 PORT EXTERNAL INTERRUPT ENABLE REGISTER 00D7H
A reset clears the EINT1 register to ‘00H’, disables EXT9-EXT6 interrupt. You can use EINT1 register
setting to select Disable interrupt or Enable interrupt (by falling, rising, or both falling and rising edge).
7 6 5 4 3 2 1 0
EINT1
EXT9IE EXT8IE EXT7IE EXT6IE
Reset value: 00H
R/W R/W R/W R/W R/W R/W R/W R/W
EXT9IE
R13/EXT9 External Interrupt Enable Bits
EXT8IE
R12/EXT8 External Interrupt Enable Bits
EXT7IE
R11/EXT7 External Interrupt Enable Bits
EXT6IE
R10/EXT6 External Interrupt Enable Bits
00: Disable Interrupt
01: Enable Interrupt by falling edge
10: Enable Interrupt by rising edge
11: Enable Interrupt by both falling and
rising edge

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