ACT apricot - Page 146

SERIAL INTERFACE
8. Return from Interrupt. This command is used to
signify to the SIO that the interrupt routine in service,
specified by the last interrupt vector supplied to the
CPU has been completed. The command is issued
through channel A only and resets the in-service
interrupt within the SIO, and allows the highest
priority interrupt pending (if any) to interrupt the CPU.
Auxiliary Resets (D6, D7). These bits specify four
commands, the function of which are as described below.
1. Null Code performs the same function as previously
described for
the Null Code of the Command bits.
2. Reset Rx
CRC Checker. This command resets the
CRC error detection circuitry located in the channel
receiver circuit.
3.
Reset Tx CRC Generator. This command resets the
CRC generator located in the channel transmitter
circuit.
4.
Reset Tx Underrun/EOM. When the SIO detects
either a Transmit Underrun condition or the End of a
Message
(EOM), a corresponding bit is set within Read
Register
0 (bit 6). The bit is reset by issuing this
command.