Advantech AIMB-584 - Page 74

AIMB-584 User Manual 62
 PCI Express Root Port 1
– PCI Express Root Port 1 [ Enabled ]
Control the PCI Express Root Port.
– ASPM Support [ Auto ]
Set the ASPM Level: Force L0s - Force all links to L0s State : AUTO - BIOS
auto configure : DISABLE - Disables ASPM
– L1 Substates PCI Express L1 Substates settings.
URR [ Disabled ]: Enable or disable PCI Express Unsupported Request
Reporting.
FER [ Disabled ]: Enable or disable PCI Express Device Fatal Error Report-
ing.
NFER [ Disabled ]: Enable or disable PCI Express Device Non-Fatal Error
Reporting.
CER [ Disabled ]: Enable or disable PCI Express Device Correctable Error
Reporting.
CTO [ Disabled ]: Enable or disable PCI Express Completion Timer TO.
SEFE [ Disabled ]: Enable or disable Root PCI Express System Error on
Fatal Error.
SENFE [ Disabled ]: Enable or disable Root PCI Express System Error on
Non-Fatal Error.
SECE [ Disabled ]: Enable or disable Root PCI Express System Error on
Correctable Error.
PME SCI [ Disabled ]: Enable or disable PCI Express PME SCI.
Hot Plug [ Disabled ]: Enable or disable PCI Express Hot Plug.
– PCIe Speed [ Auto ]
Select PCI Express port speed.