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Agilent Technologies Agilent 33500 Series

Agilent Technologies Agilent 33500 Series
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IEEE-488 Common Commands
l States stored in memory are not affected by *RST.
l If you delete an arbitrary waveform from non-volatile memory after storing the instrument state, the waveform
data is lost and the instrument will not output the waveform when the state is recalled; it will output the built-in
"exponential rise" instead.
l The front panel uses MMEMory subsystem for state storage.
*RST
Resets instrument to factory default state, independent of MEMory:STATe:RECall:AUTO setting.
Parameter Typical Return
(none) (none)
Reset the instrument:
*RST
l Does not affect stored instrument states, stored arbitrary waveforms, or I/O settings; these are stored in non-vol-
atile memory.
l Aborts a sweep or burst in progress.
*SRE <enable_value>
*SRE?
Service Request Enable. This command enables bits in the enable register for the Status Byte Register group.
Parameter Typical
Return
Decimal sum of the bits in the register (table below), default 0. For example, to enable bit 2 (value 4), bit
3 (value 8), and bit 7 (value 128), the decimal sum would be 140 (4 + 8 + 128). Default 0.
+24
Enable bits 3 and 4 in the enable register:
*SRE 24
l To enable specific bits, specify the decimal value corresponding to the binary-weighted sum of the bits in the reg-
ister. The selected bits are summarized in the "Master Summary" bit (bit 6) of the Status Byte Register. If any of
the selected bits change from 0 to 1, the instrument generates a Service Request signal.
l *CLS clears the event register, but not the enable register.
l *PSC (power-on status clear) determines whether Status Byte enable register is cleared at power on. For example,
*PSC 0 preserves the contents of the enable register through power cycles.
l Status Byte enable register is not cleared by *RST.
*STB?
Read Status Byte Query. This command queries the condition register for the Status Byte Register group.
234 Agilent 33500 Series Operating and Service Guide

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