Agilent Technologies E8257C User Manual

p-analog_rf-path
Block Diagram for the Analog RF Path, Service Guide E8251-90259
Audio 1
Audio 2
External 1
External 2
F_GEN1
F_GEN2
FM1_MUX
FM2_MUX
MOD_MUX
AM1_MUX
AM2_MUX
FM_OFFSET2
_DAC
FM2_SCALE_DAC
LF_OUT_DAC
AM1_DAC
AM2_DAC
LFO
Front Panel
A Bus
A Bus
A Bus
FM
AM
-
+
-
+
+
+
AM
FM
50 ohm
AM_OFFSET
_DAC
-
VIDEO_OUT_EN_L
RED_PULSE_SEL
RED_VREF_DAC
PULSE_ED_SEL
FED_PULSE_SEL
FED_VREF_DAC
SYNC_OUT_EN_L
PULSE IN SEL
Sync Out
Ext ALC
Front
Panel
Gate / Pulse /
Trigger Input,
Front Panel
PULSE_OUT_SEL
Internal Pulse Generator
_
+
Vref
A Bus
A Bus
A Bus
L Pulsed
RF Off
50 ohm
PG_PULSE_REP_INTERVAL
PG_MODE
PG_TRIGGER_INVERT
PG_VIDEO_BEGIN
PG_PULSE_REP_INTERVAL
PG_VIDEO_END
PG_SYNC_BEGIN
PG_SYNC_END
Video Out
A Bus
50 ohm
A Bus
A Bus
A Bus
A11 Pulse / Analog Modulation Generator
F_Gen 1
External 1
External 2
F_Gen 2
A23 Low Band
Coupler / Detector
0-2 GHz
H_Speedup Enable
V_GHZ_DAC
A9 YIG Driver
Sweep Out
Rear Panel
(0-10v)
FM
Coil
FM_ATTEN_L
FM_ATTEN_H
FM_GAIN_DAC
FM_FREQ_COMP
FM_FREQ_COMP_L
FM_ATTEN
FM_FREQ_COMP_H
800k
230: :1k
: :
:
:4k
+32 V
Main
Coil
LYO Loop
Hold 1
2k
230
Pretune
Speedup
Ramp
Sweep
YIG Pre-tune DAC
Sweep Control
Sweep_DAC
Delay_Coupler DAC
Sweep_DAC
Programmerable
Counter
Programmerable
Counter
YIG
J1
Retrace (Rear Pnl)
Z-axis / Blanking (Rear Pnl)
Stop Sweep (Rear Pnl)
Sweep Level (to A10)
(cw)
sweep=
0V
3.2-10V
J4
from A5
J9
from A6
J3
from A6
Ramp Swp
10MHz
Ref
100Hz
to / from
A6
(cw)
FGEN1_OFFSET_
DAC
FGEN2_OFFSET_
DAC
-
-
-
-
S
S
S
33.554 MHz
NS Clock
10 MHz
CNTOUT
NSCLK_ON_H
NSCLK Out
of Lock L
"Elsie" NS
OCA
ODBUS
OCC
NS_CLK
NS_Reset
NS_Address
NS_Data
ABUS
NSCLK
TUNE
100 MHZ IPG
Clock
10 MHz
IPGCLK_ON_H
IPGCLK Out
of Lock L
IPG_CLK
ABUS
IPGCLK
TUNE
10 MHz
Digital
Data
Latch
Clock
Data
DAC
Clock
Latch
Data
Clock
DAC
Data
Clock
12
12
12
12
EXT1_50_
OHMS_H
Rin = 600
or 50 ohms
Ext 1,
Front
Panel
Peak
Detect
EXT1_PEAK_V
REF_DAC
A bus
Ext1_High_H
Ext1_low_H
-10Vref
EXT2_50_
OHMS_H
Rin = 600
or 50 ohms
Ext 2,
Front
Panel
Peak
Detect
EXT1_PEAK_V
REF_DAC
A bus
Ext2_High_H
Ext2_low_H
-10Vref
X2
X2
EXT2_AC_H
EXT1_AC_H
A12 Option
1E6
Pulse Mod
Exponential
Modulation Driver
L_20MOD
_OFF
L_20/
H_40DIG
ALCMOD_LIN_DAC
ALCMOD_BIAS_DAC
_
+
H_RF_OFF
H_SM_MODE
-10v
_
+
L Unlvl
Interrupt
+66mV/dB
Det level
SM Input
Open =
Hold
3.2 to 20 GHz
ALC Mod
Loband
ALC Mod
A10 ALC
ALC
FeedFwd
L_ALC_HOLD_LATCHED
ADC
ADC
MUX
_
+
ALC_BW_SEL
L_OPENLOOP
Int Out
+10dB/V
+V
all open = 0
1
2
3
Cx1000
Cx100
Cx10
C
6.8 volts
SOURCE_SETTLED_H
FM_OFF_H
+V
_
+
H_DEEP_AM
L Pulsed RF Off
L ALC Hold
AM Input
ALC Ref -66mV/dBm
Deep
AM
Comp
_
+
Log
I/H
Delay
Burst
Comp
H_EXP_AM
L ALC Hold
L_Open Loop
H_LIN_AM
H_BURST
LVL_DAC
Delay
H_BELOW_3.2GHZ
ALCMODGAIN_DAC
Dual Slope Log Amp
HIPWRCAL_DAC
LOG_BRKPT_DAC
DET_OFS_DAC
H_DET_LPF
1 kHz
Hiband
Detector
Loband
Detector
External
Detector
0
1
2
DETECTOR_SEL
L_DETLVLX25
x 25
Timing
Signal
Gen.
27.778kHz
Sweep Level
from
A5 Sampler
J3
250 kHz - 20 GHz
10-20 GHz
J1
J3
ALC
Pulse
A30 Modulator Filter
MODF_AMP_ON_H
MODF_PATH
6
5-8
13-20
8-13
3-5
10-20
MODF_PLS_ENB_L
3.2
A26 Micro Interface Deck
X2
Doubler
3-10
10-20
5-10
3-20
Limiter
3-10
3-10
3-10
A29 20 GHz Doubler
750 MHz
16-20
13-16
10-13
to
A5 Sampler
3.2 - 10 GHz
> -7 dBm
3.2 - 10 GHz
> -7 dBm
>3.2 - 20 GHz
A27 40 GHz Doubler
Doubler
30 or 40
0-20
GHz
20-40
GHz
20-26
32-40
26-32
X2
DBL40_PATH
3
J2
ATTEN
5
A24 Coupler
A25 Detector
2-20 or 2-40 GHz
Optional
Attenuator
5/10/40/20/40
RF
Out
AT1
Attenuator
DBL40_AMP
DBL40_LPF
DBL40_BIAS
2
DBL20_AMP_ON_H
DBL20_PATH
6
0-3.2 GHz
1 GHz
Ref
MOD_
OFFSET_DAC
MODLIN_DAC
MOD_DRIVER_
BIAS/GAIN_DAC
Pulse
from
A7 Reference
250 MHz to 3.2 GHz
HET_SELECT_L
850 to
1150
MHz
6 dB
3 dB
< 250 MHZ
A8 Output
Gain
Adj
250 MHz
to 4 GHz
Bypass Mode Prelevel Detector
Pre-Level Driver
ALC
Mod
GAIN_ADJUST_DAC
ALC_MOD_DRIVER_
BIAS/GAIN_DAC
OUTPUT_LP_FILTER_SELECT
ALC_MOD_OFFSET_DAC
H_BYPASS
PRE_
LEVEL_
REF_DAC
ALC
L_EN_LIN/LOG
L_RF_OFF_MOD
BB_FILTERED
MOD_L_BW
H_BYPASS
BB_THRU
L_MODE
L_HOLD_ALC
1200 MHz
400 MHz
from
A9
Yig Driver
J4
Sweep Start / Stop
J4
Reference Input
10 MHz TCXO
Atten &
Offset
FM
Data I/O
Reclocked
VCO/N
7
YTO_FM
H_FM_INV
H_SD_FM
L_SD_OFF
L_FM_OFF
MOD_CONTROL
1 MHz PM
0.1 MHz PM
Z
o
SD
Mod
Control
5
Frac-N
Prescaler
Control
A6 Frac-N (Fine Tune)
Source Settled
Indicators
7
FM_OUT_
BAND_
DAC
9
ATTEN_
CONTROL
5
Control
2
3
16
16
FM
FM
SOURCE_SETTLED_H
from
A11 Pulse / Analog
Modulation Generator
J1
from
A7 Reference
FM_OFF_H
FM_IN_BAND_DAC
FM_IN_BAND_OFFSET_DAC
Lowband
Frac-N
Divide
Sweep_YIG Driver
3.2-10GHz
from
A29 Doubler
L_WIDELBW
L_POS_PHASE_INCR
STRB
L_RST
Prescaler
500-1000 MHz
VCO
FM
Loop Filter
&
Lead-Lag
Phase
Detector
5 MHz In
VCO
Tune
Reference
Divider /2
10 dB
Multi
Moduler
Diveder
RF
Power
Detector
from A8 Pre-Level Driver
to
Analog
Bus
8.5 GHz
FM Input
Sweep Start / Stop (to / from A9)
J3
J2
J2
to A8
A28 YIG
J1
1
10
2
3
4
5
8
9
7
> 3.2-10 GHz
> + 11 dBm
FM_OFFSET1
_DAC
> 17 dBM,
> 20 dBM 1EA
J1
S

Agilent Technologies E8257C Specifications

General

Brand	Agilent Technologies
Model	E8257C
Category	Portable Generator
Language	English