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4.13 Slave CPU
The Slave CPU (BRD86SCPU) provides the interfacing signals and I/O’s required to allow the FACP
to connect / communicate to a variety of termination boards.
A single chip micro controller U7 controls all operations of the FACP Slave CPU. This device contains
the control program within Read Only Memory (ROM).
Automatic Termination Board Sensing
A unique feature of the Slave CPU is its ability to automatically sense the type of board it is connected
to without the user having to configure the board to suit.
Connections