ADAV4601 System Design Document Confidential Information
Rev.1 August 2009 Analog Devices Page 12
EVALUATION BOARD I/O
The Evaluation board provides full I/O for the ADAV4601, including Analog I/O and digital I/O (I2S).
ANALOG I/O
The ADAV4601 evaluation board has 1 line level input, AUXIN1. This input is configured for a 2Vrms maximum
input. The three analog outputs (AUXOUT1, AUXOUT3 and AUXOUT4) are line level outputs with a 1Vrms maximum
output.
HEADPHONE OUTPUT
The ADAV4601 features 1 stereo headphone out, HPOUT1, which is available on connector J10. This output has an
integrated headphone amplifier which is capable of driving a 16ohm load. There is no load on this headphone
output by default. The headphone output is only loaded with the inclusion of a headphone jack.
SPDIF I/O
The ADAV4601 Evaluation board has an SPDIF optical receiver (U7), and an SPDIF optical transmitter (U3).
SPDIF RECEIVER
The ADAV4601 does not decode SPDIF streams, so the SPDIF receiver U19 is used to convert the SPDIF stream from
the TOSLINK connector (U7) into an I2S digital data stream along with the appropriate clock and framing signals.
When valid data is decoded by the SPDIF receiver, the data is automatically passed through to the SRC1 of the
ADAV4601 and is handled as asynchronous data. The reason this data is handled by the SRC is due to the fact that
the received data is not synchronised to the MCLK of the ADAV4601 and must be re-synchronised to the internal
processor.
Please refer to the Appendix A – Detailed Register Descriptionsfor more details on register settings.
SPDIF TRANSMITTER
The SPDIF transmitter U3 can be fed from one of two sources. The ADAV4601 has both a standard I2S digital output
which is SPDIF encoded by the SPDIF encoder U2. The ADAV4601 also has a separate SPDIF output. Either of these
SPDIF streams can be output on U3, and selection of the stream is controlled by the link LK11. When in position A,
the digital I2S data from the ADAV4601 is converted to an SPDIF stream and output on the SPDIF connector U3. In
position B, the SPDIF data transmitted is straight from the ADAV4601.
Note: The SPDIF encoder (U2) requires both a LRCLK and BCLK framing signals for the I2S data as well as an OMCK.
The evaluation board is designed to get these signals from the ADAV4601; however the appropriate register writes
must be performed to ensure that the SPDIF encoder operates correctly. If the LRCLK1 and BCLK1 are not supplied
by the user, the ADAV4601 must be set in master mode which means it can drive the LRCLK1 and BCLK1 lines. Also
the MCLK_OUT from the ADAV4601 must be enabled so as to provide the OMCK for the SPDIF receiver. These
register writes are provided in the ADAV4601 Power Up script in the default scripts directory. Please refer to the
Appendix A – Detailed Register Descriptions for more details on register settings.
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