ADAV4601 System Design Document Confidential Information
Rev.1 August 2009 Analog Devices Page 9
CLOCKING THE ADAV4601 USING THE ONBOARD CRYSTAL (Y3)
a) To enable the onboard crystal (Y3) to clock the ADAV4601, jumper 12 (J12) must be set to position 4-3. If the user
wants to use digital data from the SPDIF receiver in this mode, the data will not be synchronous to the master clock
and is therefore handled by the SRC1 of the ADAV4601. The appropriate register writes must be performed to
power up and enable the SRCs so as to ensure the correct operation of the device.
J12
Data from SPDIF,
asynchronous to MCLK
Crystal Y3 (MCLK)J12
Data from SPDIF,
asynchronous to MCLK
Crystal Y3 (MCLK)
Figure 3. Clocking using the crystal (Y3)
Once the board has been set up to use crystal (Y3) as a clock source the appropriate clock frequency must be
programmed in the ADAV4601. This crystal has a clock frequency of 24.576 MHz and therefore the input MCLK
frequency to the ADAV4601 must be set to 512*Fs. This can be done by writing directly to the initialisation register
in the ADAV4601 using SigmaStudio, please refer to the Appendix A – Detailed Register Descriptionsfor more
details on register settings
Note: The ADAV4601 evaluation board is shipped with scripts for controlling the default flow. These scripts include
the correct writes for powering up the ADAV4601 and can be tailored using the programming guide to suit the
customer’s needs.
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