System Control
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 4-53
ID073015 Non-Confidential
Table 4-31 shows the MPU Region Base Address Registers bit assignments.
To access an MPU Region Base Address Register, read or write CP15 with:
MRC p15, 0, <Rd>, c6, c1, 0 ; Read MPU Region Base Address Register
MCR p15, 0, <Rd>, c6, c1, 0 ; Write MPU Region Base Address Register
c6, MPU Region Size and Enable Registers
The MPU Region Size and Enable Register characteristics are:
Purpose • Specifies the size of the region specified by the Memory Region
Number Register.
• Identifies the address ranges that are used for a particular region.
• Enables or disables the region, and its sub-regions, specified by the
Memory Region Number Register.
Usage constraints The MPU Region Size and Enable Registers are:
• 32-bit read/write registers
• accessible in Privileged mode only.
Configurations Use these registers if the processor is configured with an MPU.
Attributes See Table 4-32 on page 4-54.
Figure 4-34 shows the MPU Region Size and Enable Registers bit assignments.
Figure 4-34 MPU Region Size and Enable Registers bit assignments
Table 4-31 MPU Region Base Address Registers bit assignments
Bits Name Function
[31:5] Base address Defines bits [31:5] of the base address of a region.
[4:0] - SBZ
Reserved Sub-region disable
31 65 0
Region size
1781516
Reserved
Enable
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