System Control
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 4-52
ID073015 Non-Confidential
There is one register that specifies which one of the sets of region registers is to be accessed.
See c6, MPU Memory Region Number Register on page 4-57. Each region has its own register
status to specify:
• region base address
• region size and enable
• region access control.
You can implement the processor with 12 or 16 regions, or without an MPU entirely. If you
implement the processor without an MPU, then there are no regions and no region programming
registers.
• When the MPU is enabled:
— The MPU determines the access permissions for all accesses to memory, including
the TCMs. Therefore, you must ensure that the memory regions in the MPU are
programmed to cover the complete TCM address space with the appropriate access
permissions. You must define at least one of the regions in the MPU.
— An access to an undefined area of memory normally generates a background fault.
• For the TCM space the processor uses the access permissions but ignores the region
attributes from MPU.
CP15, c9 sets the location of the TCM base address. For more information see c9, BTCM
Region Register on page 4-61 and c9, ATCM Region Register on page 4-62.
c6, MPU Region Base Address Registers
The MPU Region Base Address Register characteristics are:
Purpose Describes the base address of the region specified by the Memory Region
Number Register.
Usage constraints The MPU Region Base Address Registers are:
• 32-bit read/write registers
• accessible in Privileged mode only.
• The region base address must always align to the region size.
Configurations Use these registers if the processor is configured with an MPU.
Attributes See Table 4-31 on page 4-53.
Figure 4-33 shows the MPU Region Base Address Registers bit assignments.
Figure 4-33 MPU Region Base Address Registers bit assignments
31 0
Base address
45
Reserved
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