Level Two Interface
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 9-31
ID073015 Non-Confidential
For tag RAM writes, only bits [23:0] of the data bus are used. If two tag RAMs are written at
the same time, they are both written with the same data. To write only one tag RAM using the
AXI Slave, select only one RAM with bits [18:15] of the address bus.
Table 9-41 Tag register format for writes, with ECC
Data bit Description
[63:30] Not used, read-as-zero
[29:23] ECC, all ways
[22] Valid, all ways
[21:0] Tag value, all ways
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