Debug
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 12-25
ID073015 Non-Confidential
Table 12-17 shows the DBGBCR bit assignments.
Table 12-17 DBGBCR Register bit assignments
Bits Name Function
[31:29] - Do not modify on writes. On reads, the value returns zero.
[28:24] Breakpoint
address mask
This field sets a breakpoint on a range of addresses by masking lower order address bits out
of the breakpoint comparison.
a
b00000 = no mask
b00001 = Reserved
b00010 = Reserved
b00011 =
0x00000007
mask for instruction address
b00100 =
0x0000000F
mask for instruction address
b00101 =
0x0000001F
mask for instruction address
...
b11111 =
0x7FFFFFFF
mask for instruction address.
[23] - -
[22:20] M Meaning of DBGBVR:
b000 = instruction address match
b001 = linked instruction address match
b010 = unlinked context ID
b011 = linked context ID
b100 = instruction address mismatch
b101 = linked instruction address mismatch
b11x = Reserved.
For more information, see Table 12-18 on page 12-27.
[19:16] Linked BRP
number
The binary number encoded here indicates another BRP to link this one with.
• if a BRP is linked with itself, it is Unpredictable whether a breakpoint debug event is
generated
• if this BRP is linked to another BRP that is not configured for linked context ID
matching, it is Unpredictable whether a breakpoint debug event is generated.
[15:14] Secure state
access control
RAZ or SBZP.
[13:9] - Do not modify on writes. On reads, the value returns zero.
To Next Page
Loading...
