Debug
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 12-32
ID073015 Non-Confidential
12.4.18 Device Power-down and Reset Control Register
The DBGPRCR Register characteristics are:
Purpose Controls reset and power-down related functionality.
Usage constraints The DBGPRCR Register is read-write with more restricted access to some
bits.
Configurations Available in all processor configurations.
Attributes See Table 12-23.
Figure 12-14 shows the DBGPRCR bit assignments.
Figure 12-14 DBGPRCR Register bit assignments
Table 12-23 shows the DBGPRCR bit assignments.
[5] Secure invasive debug
features implemented
0b1 Implemented
[4] Secure invasive debug
features enabled
DBGEN Invasive debug enable field
[3:0]
Non-secure debug features
a
0x0 Not implemented
a. Cortex-R4 does not implement the Security Extensions, so all the debug features are considered
secure.
Table 12-22 DBGAUTHSTATUS Register bit assignments (continued)
Bits Name Value Function
31
03
Reserved
21
Hold internal reset
Force internal reset
No Power-down
Table 12-23 DBGPRCR Register bit assignments
Bits Name Function
[31:3] - Do not modify on writes. On reads, the value returns zero.
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