Integration Test Registers
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 13-9
ID073015 Non-Confidential
Table 13-7 shows the fields of the DBGITCTRL Register.
Writing to the DBGITCTRL register controls whether the processor is in its default functional
mode, or in integration mode, where the inputs and outputs of the device can be directly
controlled for the purpose of integration testing or topology detection. For more information see
the ARM Architecture Reference Manual.
Table 13-7 DBGITCTRL Register bit assignments
Bits Access Reset value Name Function
[31:1] RAZ/SBZP - - Reserved.
[0] R/W 0 INTMODE Controls whether the processor is in normal operating mode or
integration mode:
b0 = normal operation
b1 = integration mode enabled.
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