Dalsa Xtium2-CLHS PX8 - Xtium2-CLHS PX8 Reference; Hardware Architecture and Diagrams

Xtium2-CLHS PX8 User's Manual Xtium2-CLHS PX8 Reference • 40
Xtium2-CLHS PX8 Reference
Block Diagram
Host PCI Express X8 (or greater) Slot
DTE
Data-Transfer-Engine
with OLUT
PCI Express Gen2 X8 Controller
Data
Xtium-CLHS PX8
Simplified Block Diagram
Data
Control
Data
Control
Shaft Encoder A/B
I/O Controller
12V
500mA/reset
12 V Power Out
Power Gnd
D3
CLHS Status Indicator
Frame Buffer and
DMA table Memory
(512 MB)
Opto-coupled4 Trigger/General Inputs
TTL
8 Strobe/General Outputs
J1 — DH60-27P
J4 — 26-pin SHF-113-01-L-D-RA
* Caution — connect only to one, never both
RS-422
CLHS
SerDes
Control Lane
Data Lanes
Control Lane
6
1
1
J3 — CX4
1
1
Data Lanes
6
Board Status
D1
D6
Data Forwarding Status Indicator
CLHS
SerDes
Data Lanes
6
1
J2 — CX4
1
Data Lanes
6
Data / Control Lane
Data / Control Lane
Data / Control Lane
Data / Control Lane
ACU-Plus
5V
5 V Power Out
reset
Figure 7: Xtium2-CLHS PX8 Block Diagram