decaWave DW1000 - List of Figures

DW1000 User Manual
© Decawave Ltd 2017
Version 2.12
Page 3 of 242
List of Figures
FIGURE 1: SPI READ AND WRITE TRANSACTIONS ................... 11
FIGURE 2: SINGLE OCTET HEADER OF THE NON-INDEXED SPI
TRANSACTION ......................................................... 12
FIGURE 3: EXAMPLE NON-INDEXED READ OF THE DEVICE ID
REGISTER (0X00) .................................................... 12
FIGURE 4: TWO OCTET HEADER OF THE SHORT INDEXED SPI
TRANSACTION ......................................................... 12
FIGURE 5: EXAMPLE SHORT-INDEXED READ OF 3
RD
AND 4
TH
OCTETS
OF REGISTER 0X00 .................................................. 13
FIGURE 6: THREE OCTET HEADER OF THE LONG INDEXED SPI
TRANSACTION ......................................................... 13
FIGURE 7: EXAMPLE LONG-INDEXED WRITE OF ONE OCTET TO
INDEX 310 OF THE TX BUFFER ................................... 13
FIGURE 8: DW1000 STATE DIAGRAM ................................ 15
FIGURE 9: TIMING DIAGRAM AND POWER PROFILE FOR COLD
START POR ............................................................ 18
FIGURE 10: TRANSMIT FRAME FORMAT ............................... 25
FIGURE 11: BASIC TRANSMIT SEQUENCE ............................. 25
FIGURE 12 : PHR ENCODING EXTENDED LENGTH DATA FRAMES
........................................................................... 28
FIGURE 13: BASIC RECEIVE SEQUENCE .................................. 32
FIGURE 14: FLOW CHART FOR USING DOUBLE RX BUFFERING ... 38
FIGURE 15 : TRXOFF IN DOUBLE-BUFFERED MODE ............. 39
FIGURE 16: LOW POWER LISTENING WITH TWO SLEEP TIMES ... 40
FIGURE 17: POWER PROFILE FOR LOW POWER LISTENING MODE
WHERE NO FRAME IS RECEIVED ................................... 41
FIGURE 18: STATE TRANSITIONS DURING SNIFF MODE ........... 42
FIGURE 19: POWER PROFILE FOR SNIFF WHERE A FRAME IS NOT
RECEIVED ............................................................... 43
FIGURE 20: POWER PROFILE FOR SNIFF WHERE A FRAME IS
RECEIVED ............................................................... 43
FIGURE 21: POWER PROFILE FOR LOW DUTY-CYCLE SNIFF WHERE
A FRAME IS NOT RECEIVED ......................................... 44
FIGURE 22: ESTIMATED RX LEVEL VERSUS ACTUAL RX LEVEL .... 47
FIGURE 23: DW1000 EXTERNAL SYNCHRONISATION INTERFACE
............................................................................ 55
FIGURE 24: SYNCHRONISED TRANSMISSION .......................... 57
FIGURE 25: OSRS MODE RECEIVE TIMEBASE SYNCHRONISATION
............................................................................ 57
FIGURE 26: TRANSMIT POWER CONTROL OCTET .................. 106
FIGURE 27: COMBINING EDG1 AND EDV2 TO GIVE AN ED NOISE
FIGURE ................................................................ 124
FIGURE 28: FLOW CHART FOR DIRECT READ OF AON ADDRESS 167
FIGURE 29: PPM VS CRYSTAL TRIM SETTING, V
BATT
= 3.3 V . 200
FIGURE 30: TRANSMIT AND RECEIVE ANTENNA DELAY ......... 204
FIGURE 31: UWB PHY FRAME STRUCTURE ....................... 212
FIGURE 32:- BPM/BPSK DATA AND PHR MODULATION ...... 212
FIGURE 33: PHR BIT ASSIGNMENT .................................... 215
FIGURE 34: GENERAL MAC MESSAGE FORMAT ................... 217
FIGURE 35: MAC MESSAGE FRAME CONTROL FIELD .............. 218
FIGURE 36: SINGLE-SIDED TWO-WAY RANGING ................... 222
FIGURE 37: DOUBLE-SIDED TWO-WAY RANGING WITH FOUR
MESSAGES ............................................................ 224
FIGURE 38: DOUBLE-SIDED TWO-WAY RANGING WITH THREE
MESSAGES ............................................................ 224
FIGURE 39: RANGING TO 3 ANCHORS WITH JUST 5 MESSAGES
WHERE EACH ANCHOR CALCULATES ITS OWN RANGE RESULT
.......................................................................... 227