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decaWave DW1000 - User Manual

decaWave DW1000
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© Decawave Ltd 2017
Version 2.12
Page 1 of 242
DW1000 USER MANUAL
HOW TO USE, CONFIGURE AND
PROGRAM THE DW1000 UWB
TRANSCEIVER
This document is subject to change without notice
DW1000 USER MANUAL

Table of Contents

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Summary

Document Information

Disclaimer

Decawave reserves the right to change product specifications without notice.

Life Support Policy

Decawave products not authorized for use in safety-critical applications.

Regulatory Approvals

DW1000 not certified for use in any particular region; user must obtain approval.

1 Introduction

About the DW1000

Details the DW1000 IC, its features, and compliance with UWB standard.

About this document

Describes manual's content and structure, cross-references data sheet.

2 Overview of the DW1000

Interfacing to the DW1000

Details SPI interface, transaction formats, modes, and GPIO/SYNC pins.

DW1000 Operational States

Describes various operational states like OFF, WAKEUP, INIT, IDLE, SLEEP, DEEPSLEEP.

Power On Reset (POR)

Explains the Power On Reset mechanism and its timing profile.

Specific state sequences supported by the DW1000

Details state sequences like SNIFF, LOW DUTY CYCLE SNIFF, and LOW POWER LISTENING.

Default Configuration on Power Up

Summarizes default configurations for channel, preamble, and mode 2.

3 Message Transmission

Basic Transmission

Explains the process of transmitting data frames, including frame format and sequence.

Transmission timestamp

Details how message time-stamping is performed during frame transmission.

Delayed Transmission

Describes programming transmit time and initiating delayed transmission.

Extended Length Data Frames

Covers the DW1000's non-standard mode for frames up to 1023 bytes.

High Speed Transmission

Explains features supporting maximum transmitter utilization.

4 Message Reception

Basic Reception

Details receiver search for preamble, SFD, PHR, and data reception.

RX Message timestamp

Explains how the DW1000 calculates and provides RX timestamps.

Delayed Receive

Describes programming turn-on time for receiver to be ready for frame.

Double Receive Buffer

Explains the dual buffer system for receiving frames and ancillary registers.

Low-Power Listening

Details a feature for predominantly SLEEP state receiver, sampling air periodically.

Low-Power SNIFF mode

Describes a pulsed preamble detection mode where receiver is sequenced on and off.

Diagnostics

Lists diagnostic aids like LEDs, accumulator access, and RX frame quality.

Assessing the quality of reception and the RX timestamp

Discusses assessing received signal quality and timestamp data.

5 Media Access Control (MAC) hardware features

Cyclic redundancy check

Describes CRC generation for transmission and checking for reception.

Frame filtering

Explains filtering received frames based on type, address, and PAN ID.

Automatic Acknowledgement

Details the DW1000's automatic sending of acknowledgement frames.

Transmit and automatically wait for response

Describes enabling receiver after transmission to await a response.

6 Other features of the DW1000

External Synchronisation

Explains synchronizing DW1000 with external clocks or other DW1000s.

External Power Amplification

Describes using GPIO lines to control external power amplifiers.

Using the on-chip OTP memory

Details the OTP memory for device-specific configuration and calibration.

Measuring IC temperature and voltage

Explains using SAR A/D converter for sampling temperature and battery voltage.

7 The DW1000 register set

Register map overview

Lists all top-level register file IDs, lengths, types, mnemonics, and descriptions.

Detailed register description

Provides in-depth descriptions of register contents, parameters, and bit fields.

Register file: 0 x00 - Device Identifier

Describes the read-only device identifier register.

Register file: 0 x01 - Extended Unique Identifier

Details the 64-bit IEEE device address register.

Register file: 0 x03 - PAN Identifier and Short Address

Contains 16-bit PAN ID and Short Address for network identification.

Register file: 0 x04 - System Configuration

A bitmapped register for system configuration settings.

Register file: 0 x06 - System Time Counter

Provides the 40-bit system time counter for timestamps.

Register file: 0 x08 - Transmit Frame Control

Configures transmit frame parameters like length, rate, and preamble.

Register file: 0 x0 D - System Control Register

Contains control bits for TX/RX operations and system functions.

Register file: 0 x0 E - System Event Mask Register

Masks system event bits to generate interrupts.

Register file: 0 x0 F - System Event Status Register

Indicates occurrences of different system events or status changes.

Register file: 0 x1 E - Transmit Power Control

Used for configuration and control of transmitter output power.

Register file: 0 x1 F - Channel Control

Selects transmit/receive channels and configures preamble codes.

Register file: 0 x23 -AGC configuration and control

Configures receiver gain control block.

Register file: 0 x24 - External Synchronisation Control

Controls DW1000 synchronization hardware.

Register file: 0 x25 - Accumulator CIR memory

Large memory bank holding accumulated channel impulse response data.

Register file: 0 x26 - GPIO control and status

Concerned with the use of the GPIO pins.

Register file: 0 x27 - Digital receiver configuration

Low-level digital receiver configuration.

Register file: 0 x28 - Analog RF configuration block

Low-level configuration of IC analog blocks.

Register file: 0 x2 A - Transmitter Calibration block

Ensures optimum configuration of the transmit signal.

Register file: 0 x2 B - Frequency synthesiser control block

Generates carrier frequency for operating channel.

Register file: 0 x2 C - Always-on system control interface

Controls functions that remain on during SLEEP/DEEPSLEEP.

Register file: 0 x2 D - OTP Memory Interface

Interface for accessing and programming OTP memory.

Register file: 0 x2 E - Leading Edge Detection Interface

Controls LDE function for analyzing accumulator data.

Register file: 0 x2 F - Digital Diagnostics Interface

Provides diagnostics information via sub-registers.

Register file: 0 x36 - Power Management and System Control

Controls DW1000 power management and system functions.

8 DW1000 Calibration

IC Calibration - Crystal Oscillator Trim

Details trimming capacitors to fine-tune crystal oscillator frequency.

IC Calibration - Transmit power and spectrum

Optimizes transmit power spectral density for regional regulations.

IC Calibration - Antenna Delay

Explains calibrating antenna delay for accurate timestamp calculation.

9 Operational design choices when employing the DW1000

Operating range

Discusses factors affecting operational range like data rate and preamble.

Channel and Bandwidth selection

Considers regional regulations and bandwidth impact on range and power.

Choice of data rate, preamble length and PRF

Explains how data rate, preamble, and PRF affect range and accuracy.

Power consumption

Discusses power consumption relation to data rate and message length.

Node density and air utilisation

Covers ALOHA mechanism, air utilization limits, and collision probability.

Low-duty cycle - air time

Discusses LDC rules and their impact on transmission time.

Location schemes

Introduces TDOA and TOF based location methods for RTLS.

General considerations

Discusses design choices for high node density vs. range, and power saving.

10 APPENDIX 1: The IEEE 802.15.4 UWB physical layer

Frame structure overview

Explains the general structure of the UWB frame: Preamble, SFD, PHR, Data.

Data modulation scheme

Describes BPM/BPSK modulation and convolutional encoding for data and PHR.

Synchronisation header modulation scheme

Details the SHR, preamble sequence, and SFD modulation.

PHY header

Defines PHR structure, including data rate, frame length, and SECDED code.

UWB channels and preamble codes

Lists DW1000 supported UWB channels and recommended preamble codes.

Additional details on the standard

Refers reader to IEEE 802.15.4 standard for modulation details.

11 APPENDIX 2: The IEEE 802.15.4 MAC layer

General MAC message format

Describes the structure of MAC message: MHR, Payload, MFR.

The frame control field in the MAC header

Identifies frame type, security, pending status, ACK request, etc.

Frame version field

Specifies frame version number compatible with IEEE 802.15.4.

Source addressing mode field

Specifies source address type: short or extended.

The Sequence Number field

Maintains sequence numbers for beacon, data, and MAC command frames.

MAC level processing in the DW1000

Describes DW1000's role in MAC processing: FCS validation, frame parsing.

12 APPENDIX 3: Two-Way Ranging

Introduction

Describes methods for implementing two-way ranging between nodes.

Single-sided Two-way Ranging

Simple measurement of round trip delay for range estimation.

Double-sided Two-way Ranging

Extension of SS-TWR using two measurements for reduced error.

Comparison between DS and SDS two-way ranging

Compares asymmetric and symmetric DS-TWR schemes.

Infrastructure-less Peer-to-peer networks

Discusses peer-to-peer ranging and message traffic savings.

13 APPENDIX 4: Abbreviations and acronyms

14 APPENDIX 5: References

Document History

Lists revisions, dates, and descriptions of document updates.

Change Log

Details changes made in various revisions of the manual.

17 About Decawave

decaWave DW1000 Specifications

General IconGeneral
BranddecaWave
ModelDW1000
CategoryTransceiver
LanguageEnglish