2.3.2 Overview of main operational states
Table 1: Main DW1000 operational states / modes
In the OFF state the DW1000 is completely powered off, with no voltages applied to any
of its input pins. Power consumption = 0 µA. No I/O pins should be driven or power will
leak through the I/O cells.
During the WAKEUP state the crystal oscillator and the band-gap are enabled. After
approximately 4 ms the digital LDO will be enabled and the RSTn (output) will de-assert
allowing the DW1000 to enter the INIT state.
In the INIT state the main crystal oscillator is running. The raw 38.4 MHz XTAL oscillator
frequency is divided by 2 to give a 19.2 MHz internal clock called XTI. In the INIT state
digital circuitry of the DW1000 is fed from this 19.2 MHz XTI clock.
If the DW1000 has entered INIT state from a SLEEP or DEEPSLEEP state, (or as a result of
a reset), then the register configurations can be automatically restored from the AON
memory array.
Then the DW1000 turns on the CLKPLL and after 5 µs the CLKPLL will be locked and the
DW1000 will automatically transition into the IDLE state.
SPI accesses from an external microcontroller are possible in the INIT state, but these
are limited to a SPICLK input frequency of no greater than 3 MHz. Care should be taken
not to have an active SPI access in progress at the CLKPLL lock time (i.e. at t = 5 µs) when
the automatic switch from the INIT state to the IDLE state is occurring, because the
switch-over of clock source can cause bit errors in the SPI transactions.
It is possible to return to the INIT state from the IDLE state under register control by
selecting the XTAL as the clock source and by disabling what is known as sequencing so
the device does not automatically transfer into the IDLE state.
In the IDLE state the DW1000 internal clock generator CLKPLL is locked running and
ready for use but is gated off to most circuitry to minimize power consumption. In the
IDLE state SPI communications can operate at up to 20 MHz, the maximum SPICLK
frequency. In the IDLE state the analog receive and transmit circuits are powered down.
The external host can control the DW1000 to initiate a transmission or reception and
thus cause the DW1000 to progress into TX state or RX state respectively. If a delayed
TX or RX operation is initiated (see section 3.3 – Delayed Transmission and 4.2 – Delayed
Receive) then the DW1000 will stay in the IDLE state until the delayed time has elapsed,
after which it will enter the TX state or RX state.
In the SLEEP state the IC consumes < 1 µA from the external power supply inputs. All
internal LDOs are turned off. In the SLEEP state the DW1000 internal low powered ring
oscillator is running and is used to clock the sleep counter whose expiry is programmed
to “wake up” the DW1000 and progress into the WAKEUP state. While in SLEEP power
should not be applied to GPIO, SPICLK or SPIMISO pins as this will cause an increase in
leakage current.
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