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EIP 545A - Page 157

EIP 545A
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HARDWARE
PIA AND LATCH DRIVER BLOCKS
The three selected digits are manipulated by the program and sent to the PIA. First the two LSD's are
sent to port A, then the third digit (MSD) plus
a
positive-going pluse (on pin 14 of U7) that triggers the
latch U6 so that the complete 12 bit word appears to the DAC inputs
(U2). U4 and U5 are level trans-
lators from
T~L to CMOS for the DAC.
ANALOG BLOCKS
The DAC
is
referenced to
a
1 volt reference voltage that
is
generated by CR1 zener and U1 Operational
Amplifier. Gain adjustment is provided to calibrate the reference voltage. The DAC U2 converts the
12 bit
digital inputs to an analog voltage
(0.000V
-
0.999V). The output amplifier U3 provides the necessary
I/V conversion, output isolation and protection. Zero offset adjustment
is
provided for calibration
purposes, also.
SOFTWARE
The DAC software
is
described in figures 01-2 and 01-3.
Scans by ArtekMedia © 2007

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