EIP 545A - Theory of Operation

THEORY OF OPERATION
The BCDIREMOTE programming board takes data from the display and formats it as parallel data output
for the rear panel.
It also receives counter control and programming information from the 26 line input on
the rear panel to provide for remote control of the counter.
BCD THEORY OF OPERATION
During each update cycle, the counter checks for the existence of the
BCDIRMT board. If the board exists,
the program checks the state of the inhibit input. If the inhibit input
is true (+2 to +50V on the input), the
program jumps past the BCD output but the counter continues to update the display. If the input
is low,
the program scans through each of the 11 digits (LSB to MSB). Each digit is checked, and any
non-numeri-
cal digit is replaced by a zero. The resulting BCD digit is then sent to U2 through 4 bits of port B of the PIA
(U14). After each digit is made available to U2.4 clock pulses (BCD Clock) are sent to U2 (through U7) to
shift all the data in the shift registers to the right by 4 bits (1 digit). At the end of these data shift pulses, a
BCD load pulse enters the new data into U2. When the last digit
(MSB) is entered into U2, the sign bit is
simultaneously entered into U1. After all the data has been entered into the shift register, the program
sends out
a 20 microsecond print command.
REMOTE PROGRAMMING THEORY OF OPERATION
When the remote enable line
is high, none of the other remote programming lines can effect the counter.
When the remote enable line is brought low, the counter changes from local to remote operating conditions
and switches control for the counter from the front panel keyboard to the rear panel remote programming
connector. When in the remote mode, the counter waits for an input from the INPUT DATA request line.
When the input data line
is brought low, the data direction control line is sent low to put U9 in the low
impedance buffer mode. The RMT LOAD line
is then toggled to load all remote input data into the input
registers
(U8-U12). The counter then changes the data accepted output from a low to a high to indicate
that the data has been read. The 8 bits of data into U14 (from U8 and
UlO), are read by the microprocessor.
Groups of 4 clock pulses are then sent out (on the RMT CLOCK line), to shift the input data into
U10
where the data is read by the microprocessor through U14. When all the data has been read, the data direc-
tion control line
is returned to a high level, and the data accept line is returned to low, indicating the data
has been accepted by the counter.
When the INPUT DATA line is held low, the counter sets a flag and returns to read the input data at
ap
proximately 100 millisecond intervals. This continues until the INPUT DATA line is returned to high, at
which time the counter returns to the condition where it is waiting for a high to low transition on the IN-
PUT DATA line.
When the remote enable line is returned to the high state (local mode), the counter exercises a clear display
function and then returns to the (previous) local mode condition.
Scans by ArtekMedia © 2007