TROUBLESHOOTING
1.
If zero offset calibration cannot be achieved check that all digital inputs to U2 (pins
3 to 15) are at
"low" levels
(
<
+
0.5 V).
If they are, try to replace U2 or U3.
2.
If full scale calibration cannot be achieved check that there
is
6.2 volts at TP1. If voltage
is
wrong,
replace CR 1 or
R1 after verifying the
+
12 V supply. If the voltage at TP1
is
correct check TP2.
The voltage at TP2 should read 1.000 volts. If wrong the failure
is
in U1 or the resistors R2, R3 or
R4. If still wrong replace U2.
3.
The digital lines in the DAC board can be checked in three ways.
A static test by connecting the rear time base 10
MHz
output to Band.1 input.
BAND
RESOL
ENTER
:
0
0
Display shows 10.000 0
MHz
DAC
ENTER:
[7
(01
FREQ
MHz
NOW entering
r]
will cause a display of lO.XXX0
MHz.
OFFSET
The XXX are selected to the DAC board, so the three BCD's should appear on U7, pins
2 to 13 (pin 2
is
the LSB). On pin 14 there should he positive pulses. Checking two com-
binations like 777 and
888
can locate a fault in the digital path between U7 outputs and
U2 inputs.
A dynamic test that
is
provided with the DAC option.
ENTER:
Tfi
0
0
A continuous count ramp from 000 to
999
is
sent to the DAC board, regardless of DAC status
or display.
Connect the DAC rear output to an oscilloscope. A ramp should be observed going from
0 to
.999
volts. The ramp
is
built with 1 mV amplitude steps. Any failure in one or more
digital lines in the board will cause either breaking in the ramp or a multiple amplitude
steps
(2mV, 4 mV, ect.). Careful analysis will show the bad line or lines.
By Signature analysis while operating in the dynamic test just described, and checking
the following signatures.
Scans by ArtekMedia © 2007
To Next Page
Loading...