to the user. Further, up to 8 MGT pairs are available on the module connector, making possible the imple-
mentation of several high-speed protocols such as PCIe Gen3/Gen2 ×4 and USB 3.0 (simultaneous usage of
all the interfaces is limited to the available hardware resources i.e. number of transceivers and lane mapping).
The “G1” module variants offer 158 regular I/Os and 4 GTH MGT lines on the module connector at the trade-
off of no GTR transceivers available. Section 2.9.2 describes in more detail the module assembly variants
and routing options around the Processing System (PS) and Programmable Logic (PL) transceivers and I/Os.
The MPSoC device can boot from the on-board QSPI flash, from the eMMC flash or from an external SD
card. For development purposes, a JTAG interface is connected to Mercury module connector.
The available standard configurations include a 16 GB eMMC flash, a 64 MB quad SPI flash, up to 8 GB DDR4
SDRAM with ECC connected to the Processing System (PS) and up to 2 GB DDR4 SDRAM connected to the
Programmable Logic (PL). The DDR configuration on the smallest module variant (ME-XU5-2CG-1E-D10H)
does not support ECC and has only half of the DDR4 bandwidth (32-bit interface instead of 64-bit).
The module is equipped with two Gigabit Ethernet PHYs and two USB 2.0 PHYs, making it ideal for commu-
nication applications.
A real-time clock is available on the Xilinx Zynq Ultrascale+ MPSoC device.
On-board clock generation is based on a 33.33 MHz crystal oscillator and a 100 MHz LVDS oscillator for the
PL. In addition, two oscillators delivering 100 MHz and 27 MHz reference clocks for the MGT GTR lines, are
equipped on the module.
The module’s internal supply voltages are generated from a single input supply of 5 - 15 V DC. Some of
these voltages are available on the Mercury module connectors to supply circuits on the base board.
Six LEDs are connected to the MPSoC pins for status signaling.
D-0000-445-001 11 / 64 Version 07, 25.07.2019
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