Chapter 2. API Reference
esp_err_t esp_intr_enable(intr_handle_t handle)
Enable the interrupt associated with the handle.
Note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the CPU the inter-
rupt is allocated on. Other interrupts have no such restriction.
Return ESP_ERR_INVALID_ARG if the combination of arguments is invalid. ESP_OK otherwise
Parameters
• handle: The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
esp_err_t esp_intr_set_in_iram(intr_handle_t handle, bool is_in_iram)
Set the “in IRAM”status of the handler.
Note Does not work on shared interrupts.
Return ESP_ERR_INVALID_ARG if the combination of arguments is invalid. ESP_OK otherwise
Parameters
• handle: The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
• is_in_iram: Whether the handler associated with this handle resides in IRAM. Handlers residing
in IRAM can be called when cache is disabled.
void esp_intr_noniram_disable(void)
Disable interrupts that aren’t specifically marked as running from IRAM.
void esp_intr_noniram_enable(void)
Re-enable interrupts disabled by esp_intr_noniram_disable.
void esp_intr_enable_source(int inum)
enable the interrupt source based on its number
Parameters
• inum: interrupt number from 0 to 31
void esp_intr_disable_source(int inum)
disable the interrupt source based on its number
Parameters
• inum: interrupt number from 0 to 31
static int esp_intr_flags_to_level(int flags)
Get the lowest interrupt level from the flags.
Parameters
• flags: The same flags that pass to esp_intr_alloc_intrstatus API
Macros
ESP_INTR_FLAG_LEVEL1
Interrupt allocation flags.
These flags can be used to specify which interrupt qualities the code calling esp_intr_alloc* needs.Accept a
Level 1 interrupt vector (lowest priority)
ESP_INTR_FLAG_LEVEL2
Accept a Level 2 interrupt vector.
ESP_INTR_FLAG_LEVEL3
Accept a Level 3 interrupt vector.
ESP_INTR_FLAG_LEVEL4
Accept a Level 4 interrupt vector.
ESP_INTR_FLAG_LEVEL5
Accept a Level 5 interrupt vector.
ESP_INTR_FLAG_LEVEL6
Accept a Level 6 interrupt vector.
ESP_INTR_FLAG_NMI
Accept a Level 7 interrupt vector (highest priority)
Espressif Systems 1004
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