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Espressif ESP32-S2
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Chapter 3. ESP32-S2 Hardware Reference
Table 1 continued from previous page
Feature ESP32 Series ESP32-S2 Series ESP32-C3 Series
OTP 1024-bit 4096-bit 4096-bit
AES
AES-128, AES-192, AES-
256 (FIPS PUB 197)
AES-128, AES-192, AES-
256 (FIPS PUB 197)
AES-128, AES-256 (FIPS
PUB 197)
HASH SHA-1, SHA-256, SHA-384,
SHA-512 (FIPS PUB 180-4)
SHA-1, SHA-224, SHA-256,
SHA-384, SHA-512, SHA-
512/224, SHA-512/256,
SHA-512/t (FIPS PUB
180-4); DMA support
SHA-1, SHA-224, SHA-256
(FIPS PUB 180-4)
RSA Up to 4096 bits Up to 4096 bits, improved ac-
celeration options compared
with ESP32
Up to 3072 bits
RNG
HMAC
Digital signa-
ture
XTS
XTS-AES-128, XTS-
AES-256
XTS-AES-128
Other
Deep-sleep
(ULP sensor-
monitored
pattern)
100 μA (when ADC work
with a duty cycle of 1%)
22 μA (when touch sensors
work with a duty cycle of 1%)
No such pattern
Size QFN48 5*5, 6*6, depending
on variants
QFN56 7*7 QFN32 5*5
Note 1: Reduced chip area compared with ESP32
Note 2: Reduced chip area compared with ESP32 and ESP32-S2
Note 3: Die size: ESP32-C3 < ESP32-S2 < ESP32
3.1.1 Related Documents
ESP32 Datasheet (PDF)
ESP32-PICO Datasheets (PDF)
ESP32-PICO-D4
ESP32-PICO-V3
ESP32-PICO-V3-02
ESP32-S2 Datasheet (PDF)
ESP32-C3 Datasheet (PDF)
ESP Product Selector
Espressif Systems 1251
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