Chapter 2. API Reference
Return
• ESP_OK on success
• ESP_ERR_INVALID_ARG if gpio_num is not an RTC IO
Parameters
• gpio_num: GPIO number
Macros
RTC_GPIO_IS_VALID_GPIO(gpio_num)
Header File
• components/hal/include/hal/rtc_io_types.h
Enumerations
enum rtc_gpio_mode_t
RTCIO output/input mode type.
Values:
RTC_GPIO_MODE_INPUT_ONLY
Pad input
RTC_GPIO_MODE_OUTPUT_ONLY
Pad output
RTC_GPIO_MODE_INPUT_OUTPUT
Pad input + output
RTC_GPIO_MODE_DISABLED
Pad (output + input) disable
RTC_GPIO_MODE_OUTPUT_OD
Pad open-drain output
RTC_GPIO_MODE_INPUT_OUTPUT_OD
Pad input + open-drain output
2.2.5 Dedicated GPIO
Overview
The dedicated GPIO is designed for CPU interaction with GPIO matrix and IO MUX. Any GPIO that is configured
as “dedicated”can be access by CPU instructions directly, which makes it easy to achieve a high GPIO flip speed,
and simulate serial/parallel interface in a bit-banging way. As toggling a GPIO in this “CPU Dedicated”way costs
few overhead, it would be great for cases like performance measurement using an oscilloscope.
Create/Destroy GPIO Bundle
A GPIO bundle is a group of GPIOs, which can be manipulated at the same time in one CPU cycle. The maximal
number of GPIOs that a bundle can contain is limited by each CPU. What’s more, the GPIO bundle has a strong
relevance to the CPU which it derives from. Any operations on the GPIO bundle should be put inside a task
which is running on the same CPU core to the GPIO bundle belongs to. Likewise, only those ISRs who are
installed on the same CPU core are allowed to do operations on that GPIO bundle.
Note: Dedicated GPIO is more of a CPU peripheral, so it has a strong relationship with CPU core. It’s highly
recommended to install and operate GPIO bundle in a pin-to-core task. For example, if GPIOA is connected to
CPU0, and the dedicated GPIO instruction is issued from CPU1, then it’s impossible to control GPIOA.
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