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Espressif ESP32-S2 User Manual

Espressif ESP32-S2
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Chapter 2. API Reference
esp_task_wdt_reset() indicates that one or more tasks have been starved of CPU time or are stuck in a loop
somewhere.
A watched task can be unsubscribed from the TWDT using esp_task_wdt_delete(). A task that has been
unsubscribed should no longer call esp_task_wdt_reset(). Once all tasks have unsubscribed form the TWDT,
the TWDT can be deinitialized by calling esp_task_wdt_deinit().
The default timeout period for the TWDT is set using config item CONFIG_ESP_TASK_WDT_TIMEOUT_S. This
should be set to at least as long as you expect any single task will need to monopolise the CPU (for example, if you
expect the app will do a long intensive calculation and should not yield to other tasks). It is also possible to change
this timeout at runtime by calling esp_task_wdt_init().
The following config options control TWDT configuration at startup. They are all enabled by default:
CONFIG_ESP_TASK_WDT - the TWDT is initialized automatically during startup. If this option is disabled,
it is still possible to initialize the Task WDT at runtime by calling esp_task_wdt_init().
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 - Idle task is subscribed to the TWDT during startup.
If this option is disabled, it is still possible to subscribe the idle task by calling esp_task_wdt_add() at
any time.
JTAG and watchdogs While debugging using OpenOCD, the CPUs will be halted every time a breakpoint is
reached. However if the watchdog timers continue to run when a breakpoint is encountered, they will eventually
trigger a reset making it very difficult to debug code. Therefore OpenOCD will disable the hardware timers of both
the interrupt and task watchdogs at every breakpoint. Moreover, OpenOCD will not reenable them upon leaving
the breakpoint. This means that interrupt watchdog and task watchdog functionality will essentially be disabled. No
warnings or panics from either watchdogs will be generated when the ESP32-S2 is connected to OpenOCD via JTAG.
XTAL32K Watchdog Timer (XTWDT) The XTAL32K watchdog makes sure the (optional) external 32 KHz
crystal or oscillator is functioning correctly.
When XTAL32K_CLK works as the clock source of RTC_SLOW_CLK and stops oscillating, the XTAL32K watchdog
timer will detect this and generate an interrupt. It also provides functionality for automatically switching over to the
internal, but less accurate oscillator as the RTC_SLOW_CLK source.
Since the switch to the backup clock is done in hardware it can also happen during deep sleep. This means that even
if XTAL32K_CLK stops functioning while the chip in deep sleep, waiting for a timer to expire, it will still be able to
wake-up as planned.
If the XTAL32K_CLK starts functioning normally again, you can call esp_xt_wdt_restore_clk to switch back to this
clock source and re-enable the watchdog timer.
Configuration When the external 32KHz crystal or oscillator is selected (CONFIG_ESP32S2_RTC_CLK_SRC)
the XTAL32K watchdog can be enabled via the CONFIG_ESP_XT_WDT configuration flag. The timeout is con-
gured by setting CONFIG_ESP_XT_WDT_TIMEOUT. The automatic backup clock functionality is enabled via the
ref:CONFIG_ESP_XT_WDT_BACKUP_CLK_ENABLE configuration.
Interrupt Watchdog API Reference
Header File
esp_system/include/esp_int_wdt.h
Functions
void esp_int_wdt_init(void)
Initialize the non-CPU-specific parts of interrupt watchdog. This is called in the init code if the interrupt
watchdog is enabled in menuconfig.
Espressif Systems 1048
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Espressif ESP32-S2 Specifications

General IconGeneral
BrandEspressif
ModelESP32-S2
CategorySingle board computers
LanguageEnglish