Chapter 4. API Guides
Description The instruction subtracts the source register from another source register or subtracts 16-bit signed
value from a source register, and stores result to the destination register.
Examples:
1: SUB R1, R2, R3 //R1 = R2 - R3
2: sub R1, R2, 0x1234 //R1 = R2 - 0x1234
3: .set value1, 0x03 //constant value1=0x03
SUB R1, R2, value1 //R1 = R2 - value1
4: .global label //declaration of variable label
SUB R1, R2, label //R1 = R2 - label
....
label: nop //definition of variable label
AND - Logical AND of two operands
Syntax AND Rdst, Rsrc1, Rsrc2
AND Rdst, Rsrc1, imm
Operands
• Rdst - Register R[0..3]
• Rsrc1 - Register R[0..3]
• Rsrc2 - Register R[0..3]
• Imm - 16-bit signed value
Cycles 2 cycles to execute, 4 cycles to fetch next instruction
Description The instruction does logical AND of a source register and another source register or 16-bit signed value
and stores result to the destination register.
Examples:
1: AND R1, R2, R3 //R1 = R2 & R3
2: AND R1, R2, 0x1234 //R1 = R2 & 0x1234
3: .set value1, 0x03 //constant value1=0x03
AND R1, R2, value1 //R1 = R2 & value1
4: .global label //declaration of variable label
AND R1, R2, label //R1 = R2 & label
...
label: nop //definition of variable label
OR - Logical OR of two operands
Syntax OR Rdst, Rsrc1, Rsrc2
OR Rdst, Rsrc1, imm
Operands
• Rdst - Register R[0..3]
• Rsrc1 - Register R[0..3]
• Rsrc2 - Register R[0..3]
• Imm - 16-bit signed value
Cycles 2 cycles to execute, 4 cycles to fetch next instruction
Description The instruction does logical OR of a source register and another source register or 16-bit signed value
and stores result to the destination register.
Examples:
Espressif Systems 1479
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